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Searched refs:chipset (Results 1 – 25 of 123) sorted by relevance

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/external/cpuinfo/src/arm/linux/
Dchipset.c117 struct cpuinfo_arm_chipset chipset[restrict static 1]) in match_msm_apq()
164 *chipset = (struct cpuinfo_arm_chipset) { in match_msm_apq()
179 chipset->suffix[i] = c & '\xDF'; in match_msm_apq()
182 chipset->suffix[i] = c; in match_msm_apq()
203 struct cpuinfo_arm_chipset chipset[restrict static 1]) in match_sdm()
230 *chipset = (struct cpuinfo_arm_chipset) { in match_sdm()
250 struct cpuinfo_arm_chipset chipset[restrict static 1]) in match_sm()
277 *chipset = (struct cpuinfo_arm_chipset) { in match_sm()
339 struct cpuinfo_arm_chipset chipset[restrict static 1]) in match_qualcomm_special()
346 *chipset = (struct cpuinfo_arm_chipset) { in match_qualcomm_special()
[all …]
Daarch64-isa.c11 const struct cpuinfo_arm_chipset chipset[restrict static 1], in cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo()
47 if (chipset->series == cpuinfo_arm_chipset_series_samsung_exynos && chipset->model == 9810) { in cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo()
/external/cpuinfo/test/name/
Dandroid-properties-interface.c27 struct cpuinfo_arm_chipset chipset = in cpuinfo_arm_android_parse_chipset_properties() local
29 if (chipset.series == cpuinfo_arm_chipset_series_unknown) { in cpuinfo_arm_android_parse_chipset_properties()
32 cpuinfo_arm_chipset_to_string(&chipset, chipset_name); in cpuinfo_arm_android_parse_chipset_properties()
40 struct cpuinfo_arm_chipset chipset = in cpuinfo_arm_android_parse_proc_cpuinfo_hardware() local
42 if (chipset.series == cpuinfo_arm_chipset_series_unknown) { in cpuinfo_arm_android_parse_proc_cpuinfo_hardware()
45 cpuinfo_arm_fixup_chipset(&chipset, cores, max_cpu_freq_max); in cpuinfo_arm_android_parse_proc_cpuinfo_hardware()
46 cpuinfo_arm_chipset_to_string(&chipset, chipset_name); in cpuinfo_arm_android_parse_proc_cpuinfo_hardware()
54 struct cpuinfo_arm_chipset chipset = in cpuinfo_arm_android_parse_ro_product_board() local
56 if (chipset.series == cpuinfo_arm_chipset_series_unknown) { in cpuinfo_arm_android_parse_ro_product_board()
59 cpuinfo_arm_fixup_chipset(&chipset, cores, max_cpu_freq_max); in cpuinfo_arm_android_parse_ro_product_board()
[all …]
/external/igt-gpu-tools/lib/
Ddrmtest.c210 static int open_device(const char *name, unsigned int chipset) in open_device() argument
225 if (forced && chipset == DRIVER_ANY && strcmp(forced, dev_name)) in open_device()
240 if ((chipset & chip) == chip) in open_device()
248 static int __search_and_open(const char *base, int offset, unsigned int chipset) in __search_and_open() argument
261 fd = open_device(name, chipset); in __search_and_open()
269 static int __open_driver(const char *base, int offset, unsigned int chipset) in __open_driver() argument
274 fd = __search_and_open(base, offset, chipset); in __open_driver()
280 if (chipset & m->bit) { in __open_driver()
289 return __search_and_open(base, offset, chipset); in __open_driver()
301 int __drm_open_driver(int chipset) in __drm_open_driver() argument
[all …]
Ddrmtest.h80 int drm_open_driver(int chipset);
81 int drm_open_driver_master(int chipset);
82 int drm_open_driver_render(int chipset);
83 int __drm_open_driver(int chipset);
/external/cpuinfo/test/
Darm-cache.cc12 const struct cpuinfo_arm_chipset chipset = { in TEST() local
24 &chipset, 0, 8, in TEST()
33 const struct cpuinfo_arm_chipset chipset = { in TEST() local
45 &chipset, 0, 8, in TEST()
54 const struct cpuinfo_arm_chipset chipset = { in TEST() local
67 &chipset, cluster, 8, in TEST()
77 const struct cpuinfo_arm_chipset chipset = { in TEST() local
89 &chipset, 0, 8, in TEST()
98 const struct cpuinfo_arm_chipset chipset = { in TEST() local
110 &chipset, 0, 8, in TEST()
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/external/mesa3d/src/gallium/drivers/nouveau/
Dnouveau_compiler.c38 nv30_fp(int chipset, struct tgsi_token tokens[], in nv30_fp() argument
44 _nvfx_fragprog_translate(chipset >= 0x40 ? 0x4097 : 0x3097, &fp); in nv30_fp()
51 nv30_vp(int chipset, struct tgsi_token tokens[], in nv30_vp() argument
58 _nvfx_vertprog_translate(chipset >= 0x40 ? 0x4097 : 0x3097, &vp); in nv30_vp()
65 nv30_codegen(int chipset, int type, struct tgsi_token tokens[], in nv30_codegen() argument
69 return nv30_fp(chipset, tokens, size, code); in nv30_codegen()
71 return nv30_vp(chipset, tokens, size, code); in nv30_codegen()
105 nouveau_codegen(int chipset, int type, struct tgsi_token tokens[], in nouveau_codegen() argument
112 info.target = chipset; in nouveau_codegen()
143 int i, chipset = 0, type = -1; in main() local
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Dnouveau_vp3_video.c281 unsigned chipset) in nouveau_vp3_load_firmware() argument
288 if (chipset >= 0xa3 && chipset != 0xaa && chipset != 0xac) in nouveau_vp3_load_firmware()
369 int chipset = screen->device->chipset; in firmware_present() local
370 int vp3 = chipset < 0xa3 || chipset == 0xaa || chipset == 0xac; in firmware_present()
371 int vp5 = chipset >= 0xd0; in firmware_present()
384 if (chipset < 0xc0) { in firmware_present()
387 } else if (chipset < 0xe0) { in firmware_present()
439 int chipset = nouveau_screen(pscreen)->device->chipset; in nouveau_vp3_screen_get_video_param() local
440 int vp3 = chipset < 0xa3 || chipset == 0xaa || chipset == 0xac; in nouveau_vp3_screen_get_video_param()
441 int vp5 = chipset >= 0xd0; in nouveau_vp3_screen_get_video_param()
/external/cpuinfo/src/arm/
Dcache.c14 const struct cpuinfo_arm_chipset chipset[restrict static 1], in cpuinfo_arm_decode_cache()
262 switch (chipset->vendor) { in cpuinfo_arm_decode_cache()
518 switch (chipset->series) { in cpuinfo_arm_decode_cache()
520 if (chipset->model == 8998) { in cpuinfo_arm_decode_cache()
526 switch (chipset->model) { in cpuinfo_arm_decode_cache()
569 switch (chipset->series) { in cpuinfo_arm_decode_cache()
573 switch (chipset->model) { in cpuinfo_arm_decode_cache()
600 if (chipset->model == 450 && cluster_id == 0) { in cpuinfo_arm_decode_cache()
611 switch (chipset->model) { in cpuinfo_arm_decode_cache()
621 switch (chipset->model) { in cpuinfo_arm_decode_cache()
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Dapi.h82 const struct cpuinfo_arm_chipset chipset[restrict static 1],
86 struct cpuinfo_arm_chipset chipset[restrict static 1], uint32_t cores, uint32_t max_cpu_freq_max);
100 const struct cpuinfo_arm_chipset chipset[restrict static 1],
115 const struct cpuinfo_arm_chipset chipset[1],
/external/mesa3d/src/gallium/drivers/i915/
Di915_screen.c68 const char *chipset; in i915_get_name() local
72 chipset = "915G"; in i915_get_name()
75 chipset = "915GM"; in i915_get_name()
78 chipset = "945G"; in i915_get_name()
81 chipset = "945GM"; in i915_get_name()
84 chipset = "945GME"; in i915_get_name()
87 chipset = "G33"; in i915_get_name()
90 chipset = "Q35"; in i915_get_name()
93 chipset = "Q33"; in i915_get_name()
96 chipset = "Pineview G"; in i915_get_name()
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/external/mesa3d/src/loader/
Dpci_id_driver_map.c50 int chipset = nouveau_chipset(fd); in is_nouveau_vieux() local
51 return (chipset > 0 && chipset < 0x30) || in is_nouveau_vieux()
52 (chipset < 0x40 && getenv("NOUVEAU_VIEUX") != NULL); in is_nouveau_vieux()
/external/libdrm/nouveau/
Dabi16.c196 if (dev->chipset >= 0x98 && in abi16_sclass()
197 dev->chipset != 0xa0 && in abi16_sclass()
198 dev->chipset < 0xc0) { in abi16_sclass()
247 if (dev->chipset < 0xc0) in abi16_object()
250 if (dev->chipset < 0xe0) in abi16_object()
292 if (bo->device->chipset >= 0xc0) { in abi16_bo_info()
296 if (bo->device->chipset >= 0x80 || bo->device->chipset == 0x50) { in abi16_bo_info()
337 if (dev->chipset >= 0xc0) { in abi16_bo_init()
341 if (dev->chipset >= 0x80 || dev->chipset == 0x50) { in abi16_bo_init()
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_target.cpp147 extern Target *getTargetGV100(unsigned int chipset);
148 extern Target *getTargetGM107(unsigned int chipset);
149 extern Target *getTargetNVC0(unsigned int chipset);
150 extern Target *getTargetNV50(unsigned int chipset);
152 Target *Target::create(unsigned int chipset) in create() argument
156 switch (chipset & ~0xf) { in create()
159 return getTargetGV100(chipset); in create()
163 return getTargetGM107(chipset); in create()
169 return getTargetNVC0(chipset); in create()
174 return getTargetNV50(chipset); in create()
[all …]
Dnv50_ir_target_nvc0.cpp27 Target *getTargetNVC0(unsigned int chipset) in getTargetNVC0() argument
29 return new TargetNVC0(chipset); in getTargetNVC0()
35 chipset = card; in TargetNVC0()
50 switch (chipset & ~0xf) { in getBuiltinCode()
52 if (chipset < NVISA_GK20A_CHIPSET) { in getBuiltinCode()
75 switch (chipset & ~0xf) { in getBuiltinOffset()
77 if (chipset < NVISA_GK20A_CHIPSET) in getBuiltinOffset()
259 if (chipset >= NVISA_GM107_CHIPSET) in initOpInfo()
261 else if (chipset >= NVISA_GK104_CHIPSET) in initOpInfo()
268 const unsigned int gprs = (chipset >= NVISA_GK20A_CHIPSET) ? 255 : 63; in getFileSize()
[all …]
Dnv50_ir_target_nv50.cpp27 Target *getTargetNV50(unsigned int chipset) in getTargetNV50() argument
29 return new TargetNV50(chipset); in getTargetNV50()
34 chipset = card; in TargetNV50()
197 if (chipset >= 0xa0) in initOpInfo()
423 if (ty == TYPE_F64 && chipset < 0xa0) in isOpSupported()
428 return chipset >= 0xa0; in isOpSupported()
430 return chipset >= 0xa3 && chipset != 0xaa && chipset != 0xac; in isOpSupported()
Dnv50_ir_target_gm107.h8 TargetGM107(unsigned int chipset) : TargetNVC0(chipset) {} in TargetGM107() argument
/external/pigweed/pw_build/constraints/chipset/
DBUILD.bazel19 name = "chipset",
24 constraint_setting = ":chipset",
29 constraint_setting = ":chipset",
34 constraint_setting = ":chipset",
/external/cpuinfo/scripts/
Dandroid-armv7-test.sh7 adb push build/android/armeabi-v7a/chipset-test /data/local/tmp/chipset-test
10 adb shell /data/local/tmp/chipset-test --gtest_color=yes
Dandroid-arm64-test.sh7 adb push build/android/arm64-v8a/chipset-test /data/local/tmp/chipset-test
10 adb shell /data/local/tmp/chipset-test --gtest_color=yes
/external/mesa3d/src/mesa/drivers/dri/nouveau/
Dnouveau_screen.c53 nouveau_get_configs(uint32_t chipset) in nouveau_get_configs() argument
82 GL_TRUE, chipset < 0x10, GL_FALSE); in nouveau_get_configs()
123 switch (screen->device->chipset & 0xf0) { in nouveau_init_screen2()
141 screen->device->chipset); in nouveau_init_screen2()
148 configs = nouveau_get_configs(screen->device->chipset); in nouveau_init_screen2()
208 value[0] = nouveau_get_renderer_string(screen->device->chipset); in nouveau_query_renderer_string()
/external/vboot_reference/host/arch/x86/lib/
Dcrossystem_arch.c642 const struct GpioChipset *chipset = &chipsets_supported[0]; in FindChipset() local
644 while (chipset->name != NULL) { in FindChipset()
645 if (!strcmp(name, chipset->name)) in FindChipset()
646 return chipset; in FindChipset()
647 chipset++; in FindChipset()
664 const struct GpioChipset *chipset; in ReadGpio() local
690 chipset = FindChipset(controller_name); in ReadGpio()
691 if (chipset == NULL) in ReadGpio()
695 if (!chipset->ChipOffsetAndGpioNumber(&controller_num, &controller_offset, in ReadGpio()
696 chipset->name)) in ReadGpio()
/external/vboot_reference/host/arch/x86_64/lib/
Dcrossystem_arch.c642 const struct GpioChipset *chipset = &chipsets_supported[0]; in FindChipset() local
644 while (chipset->name != NULL) { in FindChipset()
645 if (!strcmp(name, chipset->name)) in FindChipset()
646 return chipset; in FindChipset()
647 chipset++; in FindChipset()
664 const struct GpioChipset *chipset; in ReadGpio() local
690 chipset = FindChipset(controller_name); in ReadGpio()
691 if (chipset == NULL) in ReadGpio()
695 if (!chipset->ChipOffsetAndGpioNumber(&controller_num, &controller_offset, in ReadGpio()
696 chipset->name)) in ReadGpio()
/external/pigweed/pw_build/platforms/
DBUILD.bazel92 constraint_values = ["//pw_build/constraints/chipset:stm32f429"],
98 constraint_values = ["//pw_build/constraints/chipset:lm3s6965evb"],
104 constraint_values = ["//pw_build/constraints/chipset:nrf52833"],
134 # Specify this chipset to use the baremetal pw_sys_io backend (because
136 "//pw_build/constraints/chipset:stm32f429",
/external/mesa3d/src/gallium/drivers/nouveau/nv30/
Dnv30_screen.c544 switch (dev->chipset & 0xf0) { in nv30_screen_create()
546 if (RANKINE_0397_CHIPSET & (1 << (dev->chipset & 0x0f))) in nv30_screen_create()
549 if (RANKINE_0697_CHIPSET & (1 << (dev->chipset & 0x0f))) in nv30_screen_create()
552 if (RANKINE_0497_CHIPSET & (1 << (dev->chipset & 0x0f))) in nv30_screen_create()
556 if (CURIE_4097_CHIPSET & (1 << (dev->chipset & 0x0f))) in nv30_screen_create()
559 if (CURIE_4497_CHIPSET & (1 << (dev->chipset & 0x0f))) in nv30_screen_create()
563 if (CURIE_4497_CHIPSET6X & (1 << (dev->chipset & 0x0f))) in nv30_screen_create()
571 NOUVEAU_ERR("unknown 3d class for 0x%02x\n", dev->chipset); in nv30_screen_create()
776 if (dev->chipset < 0x40) in nv30_screen_create()
791 if (dev->chipset < 0x40) in nv30_screen_create()

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