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Searched refs:circ (Results 1 – 25 of 33) sorted by relevance

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/external/llvm/test/CodeGen/Hexagon/
Dcirc_ld.ll10 ; r0 = memb(r1++#-1:circ(m0))
11 ; r3:2 = memd(r1++#-8:circ(m0))
12 ; r0 = memh(r1++#-2:circ(m0))
13 ; r0 = memub(r1++#-1:circ(m0))
14 ; r0 = memuh(r1++#-2:circ(m0))
15 ; r0 = memw(r1++#-4:circ(m0))
29 ; CHECK: = memb(r{{[0-9]*.}}++{{.}}#-1:circ(m{{[0-1]}}))
30 %1 = call i8* @llvm.hexagon.circ.ldb(i8* %0, i8* %inputLR, i32 %or, i32 -1)
35 declare i8* @llvm.hexagon.circ.ldb(i8*, i8*, i32, i32) nounwind
48 ; CHECK: = memd(r{{[0-9]*.}}++{{.}}#-8:circ(m{{[0-1]}}))
[all …]
Dcirc_st.ll9 ; memb(r1++#-1:circ(m0)) = r3
10 ; memd(r1++#-8:circ(m0)) = r1:0
11 ; memh(r1++#-2:circ(m0)) = r3
12 ; memh(r1++#-2:circ(m0)) = r3.h
13 ; memw(r1++#-4:circ(m0)) = r0
26 ; CHECK: memb(r{{[0-9]*}}{{.}}++{{.}}#-1:circ(m{{[0-1]}}))
27 %1 = tail call i8* @llvm.hexagon.circ.stb(i8* %0, i32 0, i32 %or, i32 -1)
31 declare i8* @llvm.hexagon.circ.stb(i8*, i32, i32, i32) nounwind
42 ; CHECK: memd(r{{[0-9]*}}{{.}}++{{.}}#-8:circ(m{{[0-1]}}))
43 %1 = tail call i8* @llvm.hexagon.circ.std(i8* %0, i64 undef, i32 %or, i32 -8)
[all …]
Dcsr-func-usedef.ll6 declare i8* @llvm.hexagon.circ.ldb(i8*, i8*, i32, i32) #1
7 declare i8* @llvm.hexagon.circ.stb(i8*, i32, i32, i32) #1
26 %0 = call i8* @llvm.hexagon.circ.ldb(i8* %p0.082, i8* nonnull %element_load0, i32 %or, i32 2)
27 %1 = call i8* @llvm.hexagon.circ.ldb(i8* %p1.079, i8* nonnull null, i32 0, i32 1)
28 %2 = call i8* @llvm.hexagon.circ.ldb(i8* %p2.078, i8* nonnull %element_load2, i32 %or5, i32 3)
29 %3 = call i8* @llvm.hexagon.circ.ldb(i8* %2, i8* nonnull %element_load5, i32 %or5, i32 1)
30 %4 = call i8* @llvm.hexagon.circ.ldb(i8* %p3.077, i8* nonnull %element_load3, i32 %or7, i32 1)
54 %11 = call i8* @llvm.hexagon.circ.stb(i8* undef, i32 undef, i32 %or, i32 3)
Dcirc-load-isel.ll2 ; CHECK: = memw{{.*}}circ
12 %0 = tail call i8* @llvm.hexagon.circ.ldw(i8* undef, i8* undef, i32 150995968, i32 4)
16 declare i8* @llvm.hexagon.circ.ldw(i8*, i8*, i32, i32) #1
Dcirc_ldw.ll2 ; CHECK: r{{[0-9]*}} = memw(r{{[0-9]*.}}++{{.}}#-4:circ(m0))
13 %2 = call i8* @llvm.hexagon.circ.ldw(i8* %0, i8* %1, i32 83886144, i32 -4)
18 declare i8* @llvm.hexagon.circ.ldw(i8*, i8*, i32, i32) nounwind
Dcirc_ldd_bug.ll17 declare i8* @llvm.hexagon.circ.ldd(i8*, i8*, i32, i32) nounwind
32 %4 = call i8* @llvm.hexagon.circ.ldd(i8* %2, i8* %3, i32 %or, i32 -8)
74 %11 = call i8* @llvm.hexagon.circ.ldd(i8* %4, i8* %3, i32 %or, i32 -8)
88 %16 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr, i8* %3, i32 %or, i32 -8)
102 %21 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr19, i8* %3, i32 %or, i32 -8)
116 %26 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr28, i8* %3, i32 %or, i32 -8)
130 %31 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr37, i8* %3, i32 %or, i32 -8)
144 %36 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr46, i8* %3, i32 %or, i32 -8)
158 %41 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8.unr55, i8* %3, i32 %or, i32 -8)
184 %47 = call i8* @llvm.hexagon.circ.ldd(i8* %var8.0.in8, i8* %3, i32 %or, i32 -8)
[all …]
/external/tensorflow/tensorflow/core/api_def/base_api/
Dapi_def_GRUBlockCellGrad.pbtxt30 Element-wise dot product is represented by \circ
56 d_h_prev = d_h_prev_component_1 + d_h_prevr \circ r + d_h \circ u
62 d_c_bar = d_h \circ (1-u) \circ (1-c \circ c)
63 d_u_bar = d_h \circ (h-c) \circ u \circ (1-u)
73 d_h_prev = d_h_prev_component_1 + d_h_prevr \circ r + u
Dapi_def_GRUBlockCell.pbtxt24 Element-wise dot product is represented by \circ
41 h_prevr = h_prev \circ r
48 h = (1-u) \circ c + u \circ h_prev
/external/llvm/test/MC/Disassembler/Hexagon/
Dld.txt14 # CHECK: r17:16 = memd(r21 ++ #40:circ(m1))
16 # CHECK: r17:16 = memd(r21 ++ I:circ(m1))
68 # CHECK: r17 = memb(r21 ++ #5:circ(m1))
70 # CHECK: r17 = memb(r21 ++ I:circ(m1))
116 # CHECK: r17:16 = memb_fifo(r21 ++ #5:circ(m1))
118 # CHECK: r17:16 = memb_fifo(r21 ++ I:circ(m1))
124 # CHECK: r17:16 = memh_fifo(r21 ++ #10:circ(m1))
126 # CHECK: r17:16 = memh_fifo(r21 ++ I:circ(m1))
138 # CHECK: r17 = memh(r21 ++ #10:circ(m1))
140 # CHECK: r17 = memh(r21 ++ I:circ(m1))
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Dst.txt14 # CHECK: memd(r17 ++ I:circ(m1)) = r21:20
16 # CHECK: memd(r17 ++ #40:circ(m1)) = r21:20
80 # CHECK: memb(r17 ++ I:circ(m1)) = r21
82 # CHECK: memb(r17 ++ #5:circ(m1)) = r21
164 # CHECK: memh(r17 ++ I:circ(m1)) = r21
166 # CHECK: memh(r17 ++ #10:circ(m1)) = r21
168 # CHECK: memh(r17 ++ I:circ(m1)) = r21.h
170 # CHECK: memh(r17 ++ #10:circ(m1)) = r21.h
294 # CHECK: memw(r17 ++ I:circ(m1)) = r21
296 # CHECK: memw(r17 ++ #20:circ(m1)) = r21
Dnv_st.txt16 # CHECK-NEXT: memb(r17 ++ I:circ(m1)) = r31.new
19 # CHECK-NEXT: memb(r17 ++ #5:circ(m1)) = r31.new
86 # CHECK-NEXT: memh(r17 ++ I:circ(m1)) = r31.new
89 # CHECK-NEXT: memh(r17 ++ #10:circ(m1)) = r31.new
156 # CHECK-NEXT: memw(r17 ++ I:circ(m1)) = r31.new
159 # CHECK-NEXT: memw(r17 ++ #20:circ(m1)) = r31.new
/external/apache-xml/src/main/java/org/apache/xml/serializer/
DHTMLEntities.properties287 # circ 710
/external/clang/test/SemaCXX/
Doverloaded-operator.cpp289 void circ() { in circ() function
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfoV4.td1051 // memd(Rx++#s4:3:circ(Mu))=Rtt
1052 // memd(Rx++I:circ(Mu))=Rtt
1208 // memb(Rx++#s4:0:circ(Mu))=Rt
1209 // memb(Rx++I:circ(Mu))=Rt
1222 // memh(Rx++#s4:1:circ(Mu))=Rt.H
1223 // memh(Rx++#s4:1:circ(Mu))=Rt
1224 // memh(Rx++I:circ(Mu))=Rt.H
1225 // memh(Rx++I:circ(Mu))=Rt
1244 // memw(Rx++#s4:2:circ(Mu))=Rt
1245 // memw(Rx++I:circ(Mu))=Rt
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DHexagonInstrInfo.td2054 "$dst = "#mnemonic#"($Rz ++ I:circ($Mu))", [],
2101 "$dst = "#mnemonic#"($Rz ++ I:circ($Mu))", [],
2131 "$dst = "#mnemonic#"($Rz ++ #$offset:circ($Mu))", [],
2156 // Byte variants of circ load
2162 // Half word variants of circ load
2170 // Word variants of circ load
2184 // One-off circ loads - not enough in common to break into a class.
3665 #mnemonic#"($Rz ++ #$offset:circ($Mu)) = $"#RegSrc#"",
3707 #mnemonic#"($Rz ++ #$offset:circ($Mu)) = $Nt.new",
3743 #mnemonic#"($Rz ++ I:circ($Mu)) = $"#RegSrc#"",
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/external/hyphenation-patterns/la/
Dhyph-la-x-liturgic.pat.txt177 .circú4m1
187 .circú4m5s4
/external/libxml2/
Dxmlschemas.c19043 xmlSchemaTreeItemPtr circ = NULL; in xmlSchemaGetCircModelGrDefRef() local
19064 circ = xmlSchemaGetCircModelGrDefRef(groupDef, in xmlSchemaGetCircModelGrDefRef()
19067 if (circ != NULL) in xmlSchemaGetCircModelGrDefRef()
19068 return (circ); in xmlSchemaGetCircModelGrDefRef()
19074 circ = xmlSchemaGetCircModelGrDefRef(groupDef, term->children); in xmlSchemaGetCircModelGrDefRef()
19075 if (circ != NULL) in xmlSchemaGetCircModelGrDefRef()
19076 return (circ); in xmlSchemaGetCircModelGrDefRef()
19108 xmlSchemaTreeItemPtr circ; in xmlSchemaCheckGroupDefCircular() local
19110 circ = xmlSchemaGetCircModelGrDefRef(item, item->children->children); in xmlSchemaCheckGroupDefCircular()
19111 if (circ != NULL) { in xmlSchemaCheckGroupDefCircular()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonDepInstrInfo.td8777 "$Ryy32 = memb_fifo($Rx32++#$Ii:circ($Mu2))",
8790 "$Ryy32 = memb_fifo($Rx32++I:circ($Mu2))",
8865 "$Ryy32 = memh_fifo($Rx32++#$Ii:circ($Mu2))",
8878 "$Ryy32 = memh_fifo($Rx32++I:circ($Mu2))",
8956 "$Rd32 = membh($Rx32++#$Ii:circ($Mu2))",
8971 "$Rd32 = membh($Rx32++I:circ($Mu2))",
9052 "$Rdd32 = membh($Rx32++#$Ii:circ($Mu2))",
9065 "$Rdd32 = membh($Rx32++I:circ($Mu2))",
9142 "$Rd32 = memubh($Rx32++#$Ii:circ($Mu2))",
9157 "$Rd32 = memubh($Rx32++I:circ($Mu2))",
[all …]
/external/python/cpython2/Modules/
Dcstubs1095 void circ float s float s float s
/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen2178 hexagon_circ_ldb, // llvm.hexagon.circ.ldb
2179 hexagon_circ_ldd, // llvm.hexagon.circ.ldd
2180 hexagon_circ_ldh, // llvm.hexagon.circ.ldh
2181 hexagon_circ_ldub, // llvm.hexagon.circ.ldub
2182 hexagon_circ_lduh, // llvm.hexagon.circ.lduh
2183 hexagon_circ_ldw, // llvm.hexagon.circ.ldw
2184 hexagon_circ_stb, // llvm.hexagon.circ.stb
2185 hexagon_circ_std, // llvm.hexagon.circ.std
2186 hexagon_circ_sth, // llvm.hexagon.circ.sth
2187 hexagon_circ_sthhi, // llvm.hexagon.circ.sthhi
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen2178 hexagon_circ_ldb, // llvm.hexagon.circ.ldb
2179 hexagon_circ_ldd, // llvm.hexagon.circ.ldd
2180 hexagon_circ_ldh, // llvm.hexagon.circ.ldh
2181 hexagon_circ_ldub, // llvm.hexagon.circ.ldub
2182 hexagon_circ_lduh, // llvm.hexagon.circ.lduh
2183 hexagon_circ_ldw, // llvm.hexagon.circ.ldw
2184 hexagon_circ_stb, // llvm.hexagon.circ.stb
2185 hexagon_circ_std, // llvm.hexagon.circ.std
2186 hexagon_circ_sth, // llvm.hexagon.circ.sth
2187 hexagon_circ_sthhi, // llvm.hexagon.circ.sthhi
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen2178 hexagon_circ_ldb, // llvm.hexagon.circ.ldb
2179 hexagon_circ_ldd, // llvm.hexagon.circ.ldd
2180 hexagon_circ_ldh, // llvm.hexagon.circ.ldh
2181 hexagon_circ_ldub, // llvm.hexagon.circ.ldub
2182 hexagon_circ_lduh, // llvm.hexagon.circ.lduh
2183 hexagon_circ_ldw, // llvm.hexagon.circ.ldw
2184 hexagon_circ_stb, // llvm.hexagon.circ.stb
2185 hexagon_circ_std, // llvm.hexagon.circ.std
2186 hexagon_circ_sth, // llvm.hexagon.circ.sth
2187 hexagon_circ_sthhi, // llvm.hexagon.circ.sthhi
[all …]
/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen2172 hexagon_circ_ldb, // llvm.hexagon.circ.ldb
2173 hexagon_circ_ldd, // llvm.hexagon.circ.ldd
2174 hexagon_circ_ldh, // llvm.hexagon.circ.ldh
2175 hexagon_circ_ldub, // llvm.hexagon.circ.ldub
2176 hexagon_circ_lduh, // llvm.hexagon.circ.lduh
2177 hexagon_circ_ldw, // llvm.hexagon.circ.ldw
2178 hexagon_circ_stb, // llvm.hexagon.circ.stb
2179 hexagon_circ_std, // llvm.hexagon.circ.std
2180 hexagon_circ_sth, // llvm.hexagon.circ.sth
2181 hexagon_circ_sthhi, // llvm.hexagon.circ.sthhi
[all …]
/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen2178 hexagon_circ_ldb, // llvm.hexagon.circ.ldb
2179 hexagon_circ_ldd, // llvm.hexagon.circ.ldd
2180 hexagon_circ_ldh, // llvm.hexagon.circ.ldh
2181 hexagon_circ_ldub, // llvm.hexagon.circ.ldub
2182 hexagon_circ_lduh, // llvm.hexagon.circ.lduh
2183 hexagon_circ_ldw, // llvm.hexagon.circ.ldw
2184 hexagon_circ_stb, // llvm.hexagon.circ.stb
2185 hexagon_circ_std, // llvm.hexagon.circ.std
2186 hexagon_circ_sth, // llvm.hexagon.circ.sth
2187 hexagon_circ_sthhi, // llvm.hexagon.circ.sthhi
[all …]
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc3658 "llvm.hexagon.circ.ldb",
3659 "llvm.hexagon.circ.ldd",
3660 "llvm.hexagon.circ.ldh",
3661 "llvm.hexagon.circ.ldub",
3662 "llvm.hexagon.circ.lduh",
3663 "llvm.hexagon.circ.ldw",
3664 "llvm.hexagon.circ.stb",
3665 "llvm.hexagon.circ.std",
3666 "llvm.hexagon.circ.sth",
3667 "llvm.hexagon.circ.sthhi",
[all …]

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