| /external/llvm/test/CodeGen/Mips/ |
| D | countleading.ll | 37 ; MIPS4-NOT: clo
39 ; MIPS32-GT-R1: clo $2, $4
41 ; MIPS64-GT-R1: clo $2, $4
43 ; MICROMIPS64: clo $2, $4
80 ; MIPS32-GT-R1-DAG: clo $[[R0:[0-9]+]], $4
81 ; MIPS32-GT-R1-DAG: clo $[[R1:[0-9]+]], $5
|
| D | 2010-11-09-CountLeading.ll | 19 ; CHECK: clo $2, $4
27 ; CHECK: clo $2, $4
|
| /external/llvm/test/MC/Mips/ |
| D | set-mips-directives.s | 17 clo $2,$2
53 # CHECK: clo $2, $2
|
| D | set-arch.s | 16 clo $2, $2
55 # CHECK: clo $2, $2
|
| D | mips64-alu-instructions.s | 10 # CHECK: clo $6, $7 # encoding: [0x21,0x30,0xe6,0x70]
38 clo $6, $7
|
| D | mips-alu-instructions.s | 11 # CHECK: clo $6, $7 # encoding: [0x21,0x30,0xe6,0x70]
42 clo $6, $7
|
| D | set-mips-directives-bad.s | 19 clo $2,$2 # CHECK: error: instruction requires a CPU feature not currently enabled
|
| /external/OpenCL-CTS/test_conformance/math_brute_force/ |
| D | utility.cpp | 98 void DivideDD(double *chi, double *clo, double a, double b) in DivideDD() argument
104 *clo = rhi / b; in DivideDD()
|
| D | reference_math.cpp | 2769 cl_ulong clo, int *exponent) in add128() argument
2773 clo = add_carry(*lo, clo, &carry); in add128()
2780 carry = clo & 1; // set aside low bit in add128()
2781 clo >>= 1; // right shift low 1 in add128()
2782 clo |= carry; // or back in the low bit, so we don't come to believe in add128()
2784 clo |= chi << 63; // move lowest high bit into highest bit of lo in add128()
2791 *lo = clo; in add128()
2795 static inline void sub128(cl_ulong *chi, cl_ulong *clo, cl_ulong hi, in sub128() argument
2799 cl_ulong rLo = *clo; in sub128()
2854 *clo = rLo; in sub128()
[all …]
|
| /external/musl/src/math/ |
| D | log_data.h | 23 double chi, clo; member
|
| D | log2_data.h | 23 double chi, clo; member
|
| D | log.c | 94 r = (z - T2[i].chi - T2[i].clo) * invc; in log()
|
| D | log2.c | 101 r = (z - T2[i].chi - T2[i].clo) * invc; in log2()
|
| /external/python/cpython2/Modules/ |
| D | shamodule.c | 242 SHA_INT32 clo; in sha_update() local
244 clo = sha_info->count_lo + ((SHA_INT32) count << 3); in sha_update()
245 if (clo < sha_info->count_lo) { in sha_update()
248 sha_info->count_lo = clo; in sha_update()
|
| D | sha256module.c | 270 SHA_INT32 clo; in sha_update() local
272 clo = sha_info->count_lo + ((SHA_INT32) count << 3); in sha_update()
273 if (clo < sha_info->count_lo) { in sha_update()
276 sha_info->count_lo = clo; in sha_update()
|
| D | sha512module.c | 296 SHA_INT32 clo; in sha512_update() local
298 clo = sha_info->count_lo + ((SHA_INT32) count << 3); in sha512_update()
299 if (clo < sha_info->count_lo) { in sha512_update()
302 sha_info->count_lo = clo; in sha512_update()
|
| /external/arm-optimized-routines/math/ |
| D | math_config.h | 407 struct {double chi, clo;} tab2[1 << LOG_TABLE_BITS]; member
422 struct {double chi, clo;} tab2[1 << LOG2_TABLE_BITS]; member
|
| /external/okhttp/website/static/ |
| D | app-theme.css | 45 .clo { color: #888; }
|
| /external/arm-optimized-routines/pl/math/ |
| D | math_config.h | 354 struct {double chi, clo;} tab2[1 << LOG10_TABLE_BITS]; member
450 double chi, clo; member
|
| D | log10_2u.c | 113 r = (z - T2[i].chi - T2[i].clo) * invc; in log10()
|
| /external/capstone/suite/MC/Mips/ |
| D | mips64-alu-instructions.s.cs | 5 0x21,0x30,0xe6,0x70 = clo $a2, $a3
|
| D | mips-alu-instructions.s.cs | 6 0x21,0x30,0xe6,0x70 = clo $a2, $a3
|
| /external/python/cpython3/Modules/ |
| D | sha256module.c | 273 SHA_INT32 clo; in sha_update() local
275 clo = sha_info->count_lo + ((SHA_INT32) count << 3); in sha_update()
276 if (clo < sha_info->count_lo) { in sha_update()
279 sha_info->count_lo = clo; in sha_update()
|
| /external/llvm/test/MC/Mips/mips5/ |
| D | invalid-mips64.s | 8 …clo $11,$a1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature no…
|
| /external/llvm/test/MC/Mips/mips4/ |
| D | invalid-mips64.s | 9 …clo $t3,$a1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature no…
|