| /external/vixl/test/aarch64/ |
| D | test-api-movprfx-aarch64.cc | 1998 __ cmla(z19.VnB(), z7.VnB(), z2.VnB(), 0); in TEST() local
2001 __ cmla(z19.VnS(), z7.VnS(), z2.VnS(), 0, 0); in TEST() local
2004 __ cmla(z19.VnH(), z7.VnH(), z2.VnH(), 0, 0); in TEST() local
2859 __ cmla(z19.VnB(), z7.VnB(), z2.VnB(), 0); in TEST() local
2862 __ cmla(z19.VnS(), z7.VnS(), z2.VnS(), 0, 0); in TEST() local
2865 __ cmla(z19.VnH(), z7.VnH(), z2.VnH(), 0, 0); in TEST() local
3185 __ cmla(z19.VnB(), z19.VnB(), z2.VnB(), 0); in TEST() local
3188 __ cmla(z19.VnS(), z19.VnS(), z2.VnS(), 0, 0); in TEST() local
3191 __ cmla(z1.VnH(), z7.VnH(), z1.VnH(), 0, 0); in TEST() local
|
| D | test-disasm-sve-aarch64.cc | 8195 COMPARE(cmla(z19.VnB(), z7.VnB(), z2.VnB(), 0), "cmla z19.b, z7.b, z2.b, #0"); in TEST()
8196 COMPARE(cmla(z19.VnD(), z7.VnD(), z2.VnD(), 90), in TEST()
8198 COMPARE(cmla(z19.VnH(), z7.VnH(), z2.VnH(), 180), in TEST()
8200 COMPARE(cmla(z19.VnS(), z7.VnS(), z2.VnS(), 270), in TEST()
|
| /external/vixl/src/aarch64/ |
| D | macro-assembler-sve-aarch64.cc | 568 V(Cmla, cmla) \
598 V(Cmla, cmla) \
|
| D | simulator-aarch64.h | 3346 LogicVRegister cmla(VectorFormat vform,
3352 LogicVRegister cmla(VectorFormat vform,
|
| D | logic-aarch64.cc | 2739 LogicVRegister Simulator::cmla(VectorFormat vform, in cmla() function in vixl::aarch64::Simulator
2785 LogicVRegister Simulator::cmla(VectorFormat vform, in cmla() function in vixl::aarch64::Simulator
2794 return cmla(vform, dst, srca, src1, temp, rot); in cmla()
|
| D | assembler-aarch64.h | 5951 void cmla(const ZRegister& zda,
5958 void cmla(const ZRegister& zda,
|
| D | simulator-aarch64.cc | 3043 cmla(vform, zda, zda, zn, zm, rot); in SimulateSVEComplexIntMulAdd()
3046 cmla(kFormatVnH, zda, zda, zn, zm_h, idx_h, rot); in SimulateSVEComplexIntMulAdd()
3049 cmla(kFormatVnS, zda, zda, zn, zm_s, idx_s, rot); in SimulateSVEComplexIntMulAdd()
|
| D | assembler-sve-aarch64.cc | 6875 void Assembler::cmla(const ZRegister& zda, in cmla() function in vixl::aarch64::Assembler
6893 void Assembler::cmla(const ZRegister& zda, in cmla() function in vixl::aarch64::Assembler
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SVEInstrInfo.td | 1273 defm CMLA_ZZZI : sve2_cmla_by_indexed_elem<0b0, "cmla">;
1278 defm CMLA_ZZZ : sve2_int_cmla<0b0, "cmla">;
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 12487 "clz\004cmeq\004cmge\004cmgt\004cmhi\004cmhs\004cmla\004cmle\004cmlo\004"
13197 …{ 636 /* cmla */, AArch64::CMLA_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEV…
13198 …{ 636 /* cmla */, AArch64::CMLA_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEV…
13199 …{ 636 /* cmla */, AArch64::CMLA_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEV…
13200 …{ 636 /* cmla */, AArch64::CMLA_ZZZ_B, Convert__SVEVectorBReg1_0__Tie0_1_1__SVEVectorBReg1_1__SVEV…
13201 …{ 636 /* cmla */, AArch64::CMLA_ZZZI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVE…
13202 …{ 636 /* cmla */, AArch64::CMLA_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVE…
20570 …{ 636 /* cmla */, AArch64::CMLA_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEV…
20571 …{ 636 /* cmla */, AArch64::CMLA_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEV…
20572 …{ 636 /* cmla */, AArch64::CMLA_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEV…
[all …]
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 6833 void cmla(const ZRegister& zda,
6844 void cmla(const ZRegister& zda,
|