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Searched refs:coherency (Results 1 – 25 of 62) sorted by relevance

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/external/autotest/client/site_tests/hardware_SAT/
Dcontrol.memory_qual13 controller issues. It can also detect bad memory cells and cache coherency
Dcontrol.hwqual13 controller issues. It can also detect bad memory cells and cache coherency
Dcontrol13 controller issues. It can also detect bad memory cells and cache coherency
/external/arm-trusted-firmware/plat/nxp/soc-ls1028a/
Dsoc.def41 # In IMAGE_BL2, compile time flag for handling Cache coherency
/external/arm-trusted-firmware/docs/plat/
Dnvidia-tegra.rst11 a dedicated 2 MiB Level-2 unified cache. A high speed coherency fabric connects
29 high speed coherency fabric connects these two processor complexes and allows
/external/arm-trusted-firmware/plat/nxp/soc-lx2160a/
Dsoc.def47 # In IMAGE_BL2, compile time flag for handling Cache coherency
/external/mesa3d/docs/relnotes/
D10.5.6.rst67 - i965: Fix PBO cache coherency issue after
/external/ComputeLibrary/tests/framework/instruments/
Dhwc.hpp115 uint32_t coherency; member
/external/angle/src/libANGLE/renderer/vulkan/
DBufferVk.h161 vk::MemoryCoherency coherency,
DBufferVk.cpp489 vk::MemoryCoherency coherency, in allocStagingBuffer() argument
498 (coherency == vk::MemoryCoherency::Coherent) == mStagingBuffer.isCoherent() && in allocStagingBuffer()
510 mStagingBuffer.allocateForCopyBuffer(contextVk, static_cast<size_t>(size), coherency)); in allocStagingBuffer()
DRendererVk.h604 uint32_t getStagingBufferMemoryTypeIndex(vk::MemoryCoherency coherency) const in getStagingBufferMemoryTypeIndex() argument
606 return coherency == vk::MemoryCoherency::Coherent in getStagingBufferMemoryTypeIndex()
Dvk_helpers.h769 MemoryCoherency coherency);
773 MemoryCoherency coherency,
Dvk_helpers.cpp4865 MemoryCoherency coherency) in allocateForCopyBuffer() argument
4868 uint32_t memoryTypeIndex = renderer->getStagingBufferMemoryTypeIndex(coherency); in allocateForCopyBuffer()
4915 MemoryCoherency coherency, in allocateForCopyImage() argument
4925 uint32_t memoryTypeIndex = renderer->getStagingBufferMemoryTypeIndex(coherency); in allocateForCopyImage()
/external/stressapptest/
DREADME.md93 …er issues. It is moderately good at catching bad memory cells and cache coherency issues. It is no…
/external/arm-trusted-firmware/docs/design/
Dfirmware-design.rst310 - Configure the Interconnect to enable hardware coherency.
471 ``SCTLR_EL3.M/I/C`` bits, flushes the data cache to the point of coherency
573 - Configure the Interconnect to enable hardware coherency.
692 interconnect coherency on entry to ``bl31_entrypoint()``. If these are disabled
801 data caches or interconnect coherency in its entrypoint. They must be explicitly
1363 the intra-cluster coherency domain etc.
1402 of any coherency domain.
1436 turning off CCI coherency during a cluster power down.
2019 There might be loss of coherency when physical memory with mismatched
2022 in TF-A during power up/down sequences when coherency, MMU and caches are
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/external/tensorflow/tensorflow/compiler/mlir/lite/quantization/ir/
DQuantOps.td83 // This op exists to ensure type coherency for between parts of the computation
/external/arm-trusted-firmware/docs/getting_started/
Dbuild-options.rst437 software operations are required for CPUs to enter and exit coherency.
438 However, newer systems exist where CPUs' entry to and exit from coherency
447 includes cores that manage coherency in hardware, then a compilation error is
449 time, cores that manage coherency in hardware and cores that don't. In other
766 require interconnect programming to enable cache coherency (eg: single
/external/arm-trusted-firmware/docs/perf/
Dpsci-performance-juno.rst212 on power on (for example, no need to enter CCI coherency)
/external/e2fsprogs/doc/RelNotes/
Dv1.36.txt106 cache coherency problem.
/external/parameter-framework/upstream/doc/requirements/
Drequirements.md135 for coherency with the immutable parameter...</why>
293 <why>For coherency a client getting a previously set parameter should return the setted value,
/external/cpuinfo/test/dmesg/
Dxperia-sl.log58 <6>[ 0.152124] CPU: Testing write buffer coherency: ok
Dnexus-s.log103 <6>[ 0.027788] CPU: Testing write buffer coherency: ok
Dnexus10.log73 <6>[ 0.031173] CPU: Testing write buffer coherency: ok
Dnexus4.log61 <6>[ 0.002014] CPU: Testing write buffer coherency: ok
/external/igt-gpu-tools/
DNEWS569 - New tests: prime_mmap_coherency/kms_mmap_write_crc cache coherency

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