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Searched refs:counter_pass (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/intel/vulkan/
Danv_perf.c402 const struct gen_perf_counter_pass *counter_pass = &pool->counter_pass[c]; in anv_perf_write_pass_results() local
404 if (counter_pass->pass != pass) in anv_perf_write_pass_results()
409 assert(counter_pass->counter->data_type == GEN_PERF_COUNTER_DATA_TYPE_UINT64); in anv_perf_write_pass_results()
410 uint32_t accu_offset = counter_pass->counter->offset / sizeof(uint64_t); in anv_perf_write_pass_results()
417 switch (counter_pass->counter->data_type) { in anv_perf_write_pass_results()
420 counter_pass->counter->oa_counter_read_uint64(perf, in anv_perf_write_pass_results()
421 counter_pass->query, in anv_perf_write_pass_results()
426 counter_pass->counter->oa_counter_read_float(perf, in anv_perf_write_pass_results()
427 counter_pass->query, in anv_perf_write_pass_results()
441 if (counter_pass->counter->units == GEN_PERF_COUNTER_UNITS_US) { in anv_perf_write_pass_results()
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DgenX_query.c71 struct gen_perf_counter_pass *counter_pass; in genX() local
129 anv_multialloc_add(&ma, &counter_pass, perf_query_info->counterIndexCount); in genX()
151 pool->counter_pass = counter_pass; in genX()
155 pool->counter_pass); in genX()
Danv_private.h4435 struct gen_perf_counter_pass *counter_pass; member
/external/mesa3d/src/intel/perf/
Dgen_perf.c923 struct gen_perf_counter_pass *counter_pass) in gen_perf_get_counters_passes() argument
932 counter_pass[i].counter = perf->counter_infos[idx].counter; in gen_perf_get_counters_passes()
935 counter_pass[i].query = &perf->queries[query_idx]; in gen_perf_get_counters_passes()
938 counter_pass[i].pass = __builtin_popcount((queries_mask << clear_bits) >> clear_bits) - 1; in gen_perf_get_counters_passes()
939 assert(counter_pass[i].pass < n_passes); in gen_perf_get_counters_passes()
Dgen_perf.h399 struct gen_perf_counter_pass *counter_pass);