| /external/arm-trusted-firmware/lib/el3_runtime/aarch64/ |
| D | context_mgmt.c | 32 static void manage_extensions_secure(cpu_context_t *ctx);
70 void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) in cm_setup_context()
369 static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx) in manage_extensions_nonsecure()
409 static void manage_extensions_secure(cpu_context_t *ctx) in manage_extensions_secure()
452 cpu_context_t *ctx; in cm_init_context_by_index()
464 cpu_context_t *ctx; in cm_init_my_context()
481 cpu_context_t *ctx = cm_get_context(security_state); in cm_prepare_el3_exit()
708 cpu_context_t *ctx; in cm_el2_sysregs_context_save()
730 cpu_context_t *ctx; in cm_el2_sysregs_context_restore()
747 cpu_context_t *ctx; in cm_el1_sysregs_context_save()
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| /external/arm-trusted-firmware/include/lib/el3_runtime/aarch64/ |
| D | context.h | 429 } cpu_context_t; typedef
432 #define get_el3state_ctx(h) (&((cpu_context_t *) h)->el3state_ctx)
434 # define get_fpregs_ctx(h) (&((cpu_context_t *) h)->fpregs_ctx)
436 #define get_el1_sysregs_ctx(h) (&((cpu_context_t *) h)->el1_sysregs_ctx)
438 # define get_el2_sysregs_ctx(h) (&((cpu_context_t *) h)->el2_sysregs_ctx)
440 #define get_gpregs_ctx(h) (&((cpu_context_t *) h)->gpregs_ctx)
441 #define get_cve_2018_3639_ctx(h) (&((cpu_context_t *) h)->cve_2018_3639_ctx)
443 # define get_pauth_ctx(h) (&((cpu_context_t *) h)->pauth_ctx)
451 CASSERT(CTX_GPREGS_OFFSET == __builtin_offsetof(cpu_context_t, gpregs_ctx), \
453 CASSERT(CTX_EL1_SYSREGS_OFFSET == __builtin_offsetof(cpu_context_t, el1_sysregs_ctx), \
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| /external/arm-trusted-firmware/include/lib/el3_runtime/aarch32/ |
| D | context.h | 55 } cpu_context_t; typedef
58 #define get_regs_ctx(h) (&((cpu_context_t *) h)->regs_ctx)
65 CASSERT(CTX_REGS_OFFSET == __builtin_offsetof(cpu_context_t, regs_ctx), \
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| /external/arm-trusted-firmware/lib/el3_runtime/aarch32/ |
| D | context_mgmt.c | 56 void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) in cm_setup_context()
160 cpu_context_t *ctx; in cm_init_context_by_index()
172 cpu_context_t *ctx; in cm_init_my_context()
188 cpu_context_t *ctx = cm_get_context(security_state); in cm_prepare_el3_exit()
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| /external/arm-trusted-firmware/include/lib/extensions/ |
| D | sve.h | 12 void sve_enable(cpu_context_t *context);
13 void sve_disable(cpu_context_t *context);
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| D | sme.h | 24 void sme_enable(cpu_context_t *context);
25 void sme_disable(cpu_context_t *context);
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| D | sys_reg_trace.h | 13 void sys_reg_trace_enable(cpu_context_t *context);
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| D | amu.h | 18 void amu_enable(bool el2_unused, cpu_context_t *ctx);
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| /external/arm-trusted-firmware/bl1/aarch32/ |
| D | bl1_context_mgmt.c | 22 static cpu_context_t bl1_cpu_context[2];
96 sizeof(cpu_context_t)); in flush_smc_and_cpu_ctx()
147 cpu_context_t *ctx = cm_get_context(security_state); in bl1_prepare_next_image()
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| /external/arm-trusted-firmware/lib/extensions/sve/ |
| D | sve.c | 28 void sve_enable(cpu_context_t *context) in sve_enable()
47 void sve_disable(cpu_context_t *context) in sve_disable()
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| /external/arm-trusted-firmware/services/std_svc/sdei/ |
| D | sdei_intr_mgmt.c | 224 static cpu_context_t *restore_and_resume_ns_context(void) in restore_and_resume_ns_context()
226 cpu_context_t *ns_ctx; in restore_and_resume_ns_context()
313 cpu_context_t *ctx, jmp_buf *dispatch_jmp) in setup_ns_dispatch()
411 cpu_context_t *ctx; in sdei_intr_handler()
596 cpu_context_t *ns_ctx; in sdei_dispatch_event()
675 cpu_context_t *ctx; in sdei_event_complete()
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| /external/arm-trusted-firmware/lib/extensions/sme/ |
| D | sme.c | 32 void sme_enable(cpu_context_t *context) in sme_enable()
79 void sme_disable(cpu_context_t *context) in sme_disable()
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| /external/arm-trusted-firmware/docs/getting_started/ |
| D | psci-lib-integration-guide.rst | 39 #. Get the non-secure ``cpu_context_t`` for the current CPU by calling
80 ``cpu_context_t`` data structure. The initialization of other non-secure CPU
90 use the same ``cpu_context_t`` data structure for PSCI CPU context management
95 ``cpu_context_t`` is stripped down for just PSCI CPU context management.
98 is expected that the EL3 Runtime Software will query the ``cpu_context_t`` and
104 Runtime Software. Using ``cpu_context_t`` as an intermediary data store
109 information) for exit into non-secure world. Using ``cpu_context_t`` as an
113 Currently the ``cpu_context_t`` data structure for AArch32 stores the following
117 to CPU context ``cpu_context_t`` data and these are described in
137 The CPU context data 'cpu_context_t' is programmed to the registers differently
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| /external/arm-trusted-firmware/plat/nvidia/tegra/common/ |
| D | tegra_fiq_glue.c | 42 cpu_context_t *ctx = cm_get_context(NON_SECURE); in tegra_fiq_interrupt_handler()
129 cpu_context_t *ctx = cm_get_context(NON_SECURE); in tegra_fiq_get_intr_context()
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| /external/arm-trusted-firmware/plat/arm/common/aarch64/ |
| D | execution_state_switch.c | 45 cpu_context_t *ctx = (cpu_context_t *) handle; in arm_execution_state_switch()
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| /external/arm-trusted-firmware/bl32/sp_min/ |
| D | sp_min_main.c | 128 cpu_context_t *ctx = cm_get_context(NON_SECURE); in sp_min_prepare_next_image_entry()
211 cpu_context_t *ctx = cm_get_context(NON_SECURE); in sp_min_warm_boot()
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| /external/arm-trusted-firmware/lib/extensions/sys_reg_trace/aarch64/ |
| D | sys_reg_trace.c | 22 void sys_reg_trace_enable(cpu_context_t *ctx) in sys_reg_trace_enable()
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| /external/arm-trusted-firmware/services/std_svc/rmmd/ |
| D | rmmd_private.h | 47 cpu_context_t cpu_ctx;
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| /external/arm-trusted-firmware/services/spd/tlkd/ |
| D | tlkd_main.c | 61 cpu_context_t *s_cpu_context; in tlkd_interrupt_handler()
207 cpu_context_t *ns_cpu_context; in tlkd_smc_handler()
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| D | tlkd_private.h | 105 cpu_context_t cpu_ctx;
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| /external/arm-trusted-firmware/services/std_svc/spm_mm/ |
| D | spm_mm_private.h | 47 cpu_context_t cpu_ctx;
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| /external/arm-trusted-firmware/services/std_svc/spmd/ |
| D | spmd_private.h | 51 cpu_context_t cpu_ctx;
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| /external/arm-trusted-firmware/include/lib/el3_runtime/ |
| D | context_mgmt.h | 35 void cm_setup_context(cpu_context_t *ctx, const struct entry_point_info *ep);
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| /external/arm-trusted-firmware/bl1/aarch64/ |
| D | bl1_context_mgmt.c | 79 static cpu_context_t bl1_cpu_context[2]; in bl1_prepare_next_image()
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| /external/arm-trusted-firmware/services/spd/opteed/ |
| D | opteed_private.h | 131 cpu_context_t cpu_ctx;
|