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/external/doclava/res/assets/templates/
Dmacros.cs1 <?cs
3 ?><?cs
4 if:dac ?><?cs
5 # standard devsite warns on inline js and script tags ?><?cs
6 set:enable_javascript = 1 ?><?cs
9 <?cs # A link to a package ?><?cs
14 /if ?><?cs var:pkg.link ?>"><?cs var:pkg.name ?></a><?cs
15 /def ?><?cs
28 .typeArguments.N.(more links) (< ... >) ?><?cs
29 def:type_link_impl(type, link) ?><?cs call:type_link_impl2(type, link, "false") ?><?cs /def ?><?cs
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Dclass.cs1 <?cs include:"doctype.cs" ?>
2 <?cs include:"macros.cs" ?>
4 <?cs include:"head_tag.cs" ?>
6 <?cs include:"header.cs" ?>
12 <?cs # are there inherited members ?>
13 <?cs each:cl=class.inherited ?>
14 <?cs if:subcount(cl.methods) ?>
15 <?cs set:inhmethods = #1 ?>
16 <?cs /if ?>
17 <?cs if:subcount(cl.constants) ?>
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/external/mesa3d/src/freedreno/vulkan/
Dtu_cs.c30 tu_cs_init(struct tu_cs *cs, in tu_cs_init() argument
37 memset(cs, 0, sizeof(*cs)); in tu_cs_init()
39 cs->device = device; in tu_cs_init()
40 cs->mode = mode; in tu_cs_init()
41 cs->next_bo_size = initial_size; in tu_cs_init()
48 tu_cs_init_external(struct tu_cs *cs, uint32_t *start, uint32_t *end) in tu_cs_init_external() argument
50 memset(cs, 0, sizeof(*cs)); in tu_cs_init_external()
52 cs->mode = TU_CS_MODE_EXTERNAL; in tu_cs_init_external()
53 cs->start = cs->reserved_end = cs->cur = start; in tu_cs_init_external()
54 cs->end = end; in tu_cs_init_external()
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Dtu_cs.h31 tu_cs_init(struct tu_cs *cs,
37 tu_cs_init_external(struct tu_cs *cs, uint32_t *start, uint32_t *end);
40 tu_cs_finish(struct tu_cs *cs);
43 tu_cs_begin(struct tu_cs *cs);
46 tu_cs_end(struct tu_cs *cs);
49 tu_cs_begin_sub_stream(struct tu_cs *cs, uint32_t size, struct tu_cs *sub_cs);
52 tu_cs_alloc(struct tu_cs *cs,
58 tu_cs_end_sub_stream(struct tu_cs *cs, struct tu_cs *sub_cs);
61 tu_cs_end_draw_state(struct tu_cs *cs, struct tu_cs *sub_cs) in tu_cs_end_draw_state() argument
63 struct tu_cs_entry entry = tu_cs_end_sub_stream(cs, sub_cs); in tu_cs_end_draw_state()
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/external/doclava/res/assets/templates-sdk/
Dclass.cs1 <?cs # THIS CREATES A CLASS OR INTERFACE PAGE FROM .java FILES ?>
2 <?cs include:"macros.cs" ?>
3 <?cs include:"macros_override.cs" ?>
4 <?cs
11 <?cs
13 ?><?cs def:write_method_summary(methods, included) ?>
14 <?cs set:count = #1 ?>
15 <?cs each:method = methods ?>
16 <tr <?cs
18 ?>data-version-added="<?cs var:method.since ?>"<?cs
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Dmacros_override.cs1 <?cs # Create a comma separated list of annotations on obj that were in showAnnotations in Doclava …
2 <?cs # pre is an HTML string to start the list, post is an HTML string to close the list ?>
3 <?cs # for example call:show_annotations_list(cl, "<td>Annotations: ", "</td>") ?>
4 <?cs # if obj has nothing on obj.showAnnotations, nothing will be output ?>
5 <?cs def:show_annotations_list(obj) ?>
6 <?cs each:anno = obj.showAnnotations ?>
7 <?cs if:first(anno) ?>
10 <?cs /if ?>
11 @<?cs var:anno.type.label ?>
12 <?cs if:last(anno) == 0 ?>
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Dpage_info.cs1 <?cs # optional, more info about the page, such as API level and links ?>
2 <?cs
5 <?cs
9 ?><?cs
14 <?cs call:since_tags(package) ?>
15 <?cs call:federated_refs(package) ?>
17 </div><?cs
21 ?><?cs
26 <?cs call:since_tags(class) ?>
27 <?cs if:class.artifact ?>
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Dcustomizations.cs1 <?cs def:body_content_wrap_start() ?>
3 <?cs /def ?><?cs
8 <?cs /def ?><?cs
10 # The default side navigation for the reference docs ?><?cs
20 <?cs if:reference.gcm || reference.gms ?>
21 <?cs include:"../../../../frameworks/base/docs/html/google/google_toc.cs" ?>
25 <?cs else ?>
40 var SINCE_DATA = [ <?cs
42 var:since.name ?>'<?cs
43 if:!last(since) ?>, <?cs /if ?><?cs
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Ddocpage.cs1 <?cs if:!devsite ?><?cs
2 include:"doctype.cs" ?><?cs /if ?><?cs
3 include:"macros.cs" ?><html<?cs if:devsite ?> devsite<?cs /if ?>>
4 <?cs include:"head_tag.cs" ?>
5 <body<?cs
42 /if ?>" itemscope itemtype="http://schema.org/Article"><?cs
43 /if ?>><?cs
44 include:"header.cs" ?><?cs
46 if:(design||training||walkthru) && !page.trainingcourse && !page.article ?><?cs
47 # header logic for docs that provide previous/next buttons ?><?cs
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Dpackage.cs1 <?cs # THIS CREATES A PACKAGE SUMMARY PAGE FROM EACH package.html FILES
3 <?cs include:"macros.cs" ?>
4 <?cs include:"macros_override.cs" ?>
5 <?cs include:"doctype.cs" ?>
6 <html<?cs if:devsite ?> devsite<?cs /if ?>>
7 <?cs include:"head_tag.cs" ?>
8 <?cs include:"body_tag.cs" ?>
12 <?cs if:(dac&&package.since)
13 ?><meta itemprop="path" content="API level <?cs var:package.since ?>" /><?cs
15 <?cs include:"header.cs" ?>
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Dclasses.cs1 <?cs # THIS CREATES A LIST OF ALL PACKAGES AND NAMES IT packages.html ?>
2 <?cs include:"macros.cs" ?>
3 <?cs include:"macros_override.cs" ?>
4 <?cs include:"doctype.cs" ?>
5 <html<?cs if:devsite ?> devsite<?cs /if ?>>
6 <?cs include:"head_tag.cs" ?>
7 <?cs include:"body_tag.cs" ?>
8 <?cs include:"header.cs" ?>
10 <h1><?cs var:page.title ?></h1>
14 <?cs each:letter=docs.classes ?>
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Dsampleindex.cs1 <?cs include:"doctype.cs" ?>
2 <?cs include:"macros.cs" ?>
3 <html<?cs if:devsite ?> devsite<?cs /if ?>>
4 <?cs include:"head_tag.cs" ?>
6 <?cs include:"header.cs" ?>
13 <?cs if:projectStructure ?>
15 &#124; Project<?cs else ?>Overview
17 <?cs /if ?>
26 <h1 itemprop="name"><?cs var:projectDir ?></h1>
29 <?cs def:display_files(files) ?>
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Dpackages.cs1 <?cs # THIS CREATES A LIST OF ALL PACKAGES AND NAMES IT packages.html ?>
2 <?cs include:"macros.cs" ?>
3 <?cs include:"doctype.cs" ?>
4 <html<?cs if:devsite ?> devsite<?cs /if ?>>
5 <?cs include:"head_tag.cs" ?>
6 <?cs include:"body_tag.cs" ?>
7 <?cs include:"header.cs" ?>
9 <h1><?cs var:page.title ?></h1>
13 <?cs set:count = #1 ?>
15 <?cs each:pkg = docs.packages ?>
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Dsample.cs1 <?cs include:"doctype.cs" ?>
2 <?cs include:"macros.cs" ?>
3 <html<?cs if:devsite ?> devsite<?cs /if ?>>
4 <?cs include:"head_tag.cs" ?>
6 <?cs include:"header.cs" ?>
26 <?cs each:item = parentdirs ?>
27 <?cs if:LinkifyPathCrumb
28 ?><a href="<?cs var:toroot ?><?cs var:item.Link ?>"><?cs var:item.Name ?></a> /
29 <?cs else
30 ?><?cs var:item.Name ?> / <?cs /if ?>
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/external/mesa3d/src/amd/vulkan/
Dradv_cs.h35 struct radeon_cmdbuf *cs, in radeon_check_space() argument
38 if (cs->max_dw - cs->cdw < needed) in radeon_check_space()
39 ws->cs_grow(cs, needed); in radeon_check_space()
40 return cs->cdw + needed; in radeon_check_space()
43 static inline void radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq() argument
46 assert(cs->cdw + 2 + num <= cs->max_dw); in radeon_set_config_reg_seq()
48 radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0)); in radeon_set_config_reg_seq()
49 radeon_emit(cs, (reg - SI_CONFIG_REG_OFFSET) >> 2); in radeon_set_config_reg_seq()
52 static inline void radeon_set_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_config_reg() argument
54 radeon_set_config_reg_seq(cs, reg, 1); in radeon_set_config_reg()
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Dsi_cmd_buffer.c38 struct radeon_cmdbuf *cs, in si_write_harvested_raster_configs() argument
54 radeon_set_config_reg(cs, R_00802C_GRBM_GFX_INDEX, in si_write_harvested_raster_configs()
59 radeon_set_uconfig_reg(cs, R_030800_GRBM_GFX_INDEX, in si_write_harvested_raster_configs()
62 radeon_set_context_reg(cs, R_028350_PA_SC_RASTER_CONFIG, raster_config_se[se]); in si_write_harvested_raster_configs()
67 radeon_set_config_reg(cs, R_00802C_GRBM_GFX_INDEX, in si_write_harvested_raster_configs()
72 radeon_set_uconfig_reg(cs, R_030800_GRBM_GFX_INDEX, in si_write_harvested_raster_configs()
77 radeon_set_context_reg(cs, R_028354_PA_SC_RASTER_CONFIG_1, raster_config_1); in si_write_harvested_raster_configs()
82 struct radeon_cmdbuf *cs) in si_emit_compute() argument
84 radeon_set_sh_reg_seq(cs, R_00B810_COMPUTE_START_X, 3); in si_emit_compute()
85 radeon_emit(cs, 0); in si_emit_compute()
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/external/flatbuffers/tests/FlatBuffers.Test/
DFlatBuffers.Core.Test.csproj9 <Compile Remove="Properties\AssemblyInfo.cs" />
31 <Compile Include="..\..\net\FlatBuffers\ByteBuffer.cs">
32 <Link>FlatBuffers\ByteBuffer.cs</Link>
34 <Compile Include="..\..\net\FlatBuffers\ByteBufferUtil.cs">
35 <Link>FlatBuffers\ByteBufferUtil.cs</Link>
37 <Compile Include="..\..\net\FlatBuffers\IFlatbufferObject.cs">
38 <Link>FlatBuffers\IFlatbufferObject.cs</Link>
40 <Compile Include="..\..\net\FlatBuffers\Offset.cs">
41 <Link>FlatBuffers\Offset.cs</Link>
43 <Compile Include="..\..\net\FlatBuffers\FlatBufferBuilder.cs">
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/external/iptables/iptables/
Dnft-ipv4.c31 struct iptables_command_state *cs = data; in nft_ipv4_add() local
36 if (cs->fw.ip.iniface[0] != '\0') { in nft_ipv4_add()
37 op = nft_invflags2cmp(cs->fw.ip.invflags, IPT_INV_VIA_IN); in nft_ipv4_add()
38 add_iniface(r, cs->fw.ip.iniface, op); in nft_ipv4_add()
41 if (cs->fw.ip.outiface[0] != '\0') { in nft_ipv4_add()
42 op = nft_invflags2cmp(cs->fw.ip.invflags, IPT_INV_VIA_OUT); in nft_ipv4_add()
43 add_outiface(r, cs->fw.ip.outiface, op); in nft_ipv4_add()
46 if (cs->fw.ip.proto != 0) { in nft_ipv4_add()
47 op = nft_invflags2cmp(cs->fw.ip.invflags, XT_INV_PROTO); in nft_ipv4_add()
48 add_l4proto(r, cs->fw.ip.proto, op); in nft_ipv4_add()
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Dnft-ipv6.c30 struct iptables_command_state *cs = data; in nft_ipv6_add() local
35 if (cs->fw6.ipv6.iniface[0] != '\0') { in nft_ipv6_add()
36 op = nft_invflags2cmp(cs->fw6.ipv6.invflags, IPT_INV_VIA_IN); in nft_ipv6_add()
37 add_iniface(r, cs->fw6.ipv6.iniface, op); in nft_ipv6_add()
40 if (cs->fw6.ipv6.outiface[0] != '\0') { in nft_ipv6_add()
41 op = nft_invflags2cmp(cs->fw6.ipv6.invflags, IPT_INV_VIA_OUT); in nft_ipv6_add()
42 add_outiface(r, cs->fw6.ipv6.outiface, op); in nft_ipv6_add()
45 if (cs->fw6.ipv6.proto != 0) { in nft_ipv6_add()
46 op = nft_invflags2cmp(cs->fw6.ipv6.invflags, XT_INV_PROTO); in nft_ipv6_add()
47 add_l4proto(r, cs->fw6.ipv6.proto, op); in nft_ipv6_add()
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/external/cronet/net/cookies/
Dcookie_store_unittest.h145 CookieStore* cs,
149 DCHECK(cs);
155 return GetCookiesWithOptions(cs, url, options,
160 CookieStore* cs,
166 cs, url, options, cookie_partition_key_collection));
170 CookieStore* cs,
175 DCHECK(cs);
177 cs->GetCookieListWithOptionsAsync(
185 CookieStore* cs,
189 return GetCookieListWithOptions(cs, url, CookieOptions::MakeAllInclusive(),
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/external/tcpdump/
Dcpack.c59 nd_cpack_align_and_reserve(struct cpack_state *cs, size_t wordsize) in nd_cpack_align_and_reserve() argument
64 next = nd_cpack_next_boundary(cs->c_buf, cs->c_next, wordsize); in nd_cpack_align_and_reserve()
67 if (next - cs->c_buf + wordsize > cs->c_len) in nd_cpack_align_and_reserve()
75 nd_cpack_advance(struct cpack_state *cs, const size_t toskip) in nd_cpack_advance() argument
78 if (cs->c_next - cs->c_buf + toskip > cs->c_len) in nd_cpack_advance()
80 cs->c_next += toskip; in nd_cpack_advance()
85 nd_cpack_init(struct cpack_state *cs, const uint8_t *buf, size_t buflen) in nd_cpack_init() argument
87 memset(cs, 0, sizeof(*cs)); in nd_cpack_init()
89 cs->c_buf = buf; in nd_cpack_init()
90 cs->c_len = buflen; in nd_cpack_init()
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/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_cs.c124 csc->cs.chunks = (uint64_t)(uintptr_t)csc->chunk_array; in radeon_init_cs_context()
174 struct radeon_drm_cs *cs; in radeon_drm_cs_create() local
176 cs = CALLOC_STRUCT(radeon_drm_cs); in radeon_drm_cs_create()
177 if (!cs) { in radeon_drm_cs_create()
180 util_queue_fence_init(&cs->flush_completed); in radeon_drm_cs_create()
182 cs->ws = ws; in radeon_drm_cs_create()
183 cs->flush_cs = flush; in radeon_drm_cs_create()
184 cs->flush_data = flush_ctx; in radeon_drm_cs_create()
186 if (!radeon_init_cs_context(&cs->csc1, cs->ws)) { in radeon_drm_cs_create()
187 FREE(cs); in radeon_drm_cs_create()
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/external/mesa3d/src/gallium/drivers/r600/
Dr600_cs.h45 struct radeon_cmdbuf *cs, in radeon_cs_memory_below_limit() argument
48 vram += cs->used_vram; in radeon_cs_memory_below_limit()
49 gtt += cs->used_gart; in radeon_cs_memory_below_limit()
77 ring->cs, rbo->buf, in radeon_add_to_buffer_list()
108 !radeon_cs_memory_below_limit(rctx->screen, ring->cs, in radeon_add_to_buffer_list_check_mem()
121 struct radeon_cmdbuf *cs = ring->cs; in r600_emit_reloc() local
126 radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); in r600_emit_reloc()
127 radeon_emit(cs, reloc); in r600_emit_reloc()
131 static inline void radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq() argument
134 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_config_reg_seq()
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Dcayman_msaa.c144 static void cayman_emit_msaa_sample_locs(struct radeon_cmdbuf *cs, int nr_samples) in cayman_emit_msaa_sample_locs() argument
149 radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0); in cayman_emit_msaa_sample_locs()
150 radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0); in cayman_emit_msaa_sample_locs()
151 radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0); in cayman_emit_msaa_sample_locs()
152 radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0); in cayman_emit_msaa_sample_locs()
155 radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_2x[0]); in cayman_emit_msaa_sample_locs()
156 radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_2x[1]); in cayman_emit_msaa_sample_locs()
157 radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_2x[2]); in cayman_emit_msaa_sample_locs()
158 radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_2x[3]); in cayman_emit_msaa_sample_locs()
161 radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_4x[0]); in cayman_emit_msaa_sample_locs()
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/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_build_pm4.h42 static inline void radeon_set_config_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_config_reg_seq() argument
46 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_config_reg_seq()
47 radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0)); in radeon_set_config_reg_seq()
48 radeon_emit(cs, (reg - SI_CONFIG_REG_OFFSET) >> 2); in radeon_set_config_reg_seq()
51 static inline void radeon_set_config_reg(struct radeon_cmdbuf *cs, unsigned reg, unsigned value) in radeon_set_config_reg() argument
53 radeon_set_config_reg_seq(cs, reg, 1); in radeon_set_config_reg()
54 radeon_emit(cs, value); in radeon_set_config_reg()
57 static inline void radeon_set_context_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num) in radeon_set_context_reg_seq() argument
61 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_context_reg_seq()
62 radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, num, 0)); in radeon_set_context_reg_seq()
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