/external/lua/src/ |
D | liolib.c | 475 char decp[2]; in read_number() local 477 decp[0] = lua_getlocaledecpoint(); /* get decimal point from locale */ in read_number() 478 decp[1] = '.'; /* always accept a dot */ in read_number() 487 if (test2(&rn, decp)) /* decimal point? */ in read_number()
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/external/arm-optimized-routines/string/aarch64/ |
D | strrchr-sve.S | 74 decp x0, p3.b /* retard pointer to last match */
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenAsmMatcher.inc | 12494 "decp\004decw\003dmb\004drps\003dsb\003dup\004dupm\003eon\003eor\004eor3" 13488 …{ 939 /* decp */, AArch64::DECP_XP_H, Convert__Reg1_0__SVEPredicateHReg1_1__Tie0_1_1, AMFBS_HasSVE… 13489 …{ 939 /* decp */, AArch64::DECP_XP_S, Convert__Reg1_0__SVEPredicateSReg1_1__Tie0_1_1, AMFBS_HasSVE… 13490 …{ 939 /* decp */, AArch64::DECP_XP_D, Convert__Reg1_0__SVEPredicateDReg1_1__Tie0_1_1, AMFBS_HasSVE… 13491 …{ 939 /* decp */, AArch64::DECP_XP_B, Convert__Reg1_0__SVEPredicateBReg1_1__Tie0_1_1, AMFBS_HasSVE… 13492 …{ 939 /* decp */, AArch64::DECP_ZP_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPredicateHReg1_1, AM… 13493 …{ 939 /* decp */, AArch64::DECP_ZP_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1, … 13494 …{ 939 /* decp */, AArch64::DECP_ZP_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicateSReg1_1, AM… 13495 …{ 939 /* decp */, AArch64::DECP_ZP_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1, … 13496 …{ 939 /* decp */, AArch64::DECP_ZP_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEPredicateDReg1_1, AM… [all …]
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/external/vixl/test/aarch64/ |
D | test-disasm-sve-aarch64.cc | 2016 COMPARE(decp(x17, p0.VnB()), "decp x17, p0.b"); in TEST() 2017 COMPARE(decp(x17, p0.VnH()), "decp x17, p0.h"); in TEST() 2018 COMPARE(decp(x17, p0.VnS()), "decp x17, p0.s"); in TEST() 2019 COMPARE(decp(x17, p0.VnD()), "decp x17, p0.d"); in TEST() 2020 COMPARE(decp(z2.VnH(), p11), "decp z2.h, p11"); in TEST() 2021 COMPARE(decp(z2.VnS(), p11), "decp z2.s, p11"); in TEST() 2022 COMPARE(decp(z2.VnD(), p11), "decp z2.d, p11"); in TEST()
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D | test-api-movprfx-aarch64.cc | 1116 __ decp(z14.VnS(), p5); in TEST() local 1413 __ decp(z7.VnD(), p2); in TEST() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SVEInstrInfo.td | 922 defm DECP_XP : sve_int_count_r_x64<0b10100, "decp">; 929 defm DECP_ZP : sve_int_count_v<0b10100, "decp">;
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 4008 void decp(const Register& rdn, const PRegisterWithLaneSize& pg); 4011 void decp(const ZRegister& zdn, const PRegister& pg);
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D | assembler-sve-aarch64.cc | 2022 void Assembler::decp(const Register& rdn, const PRegisterWithLaneSize& pg) { in decp() function in vixl::aarch64::Assembler 2034 void Assembler::decp(const ZRegister& zdn, const PRegister& pg) { in decp() function in vixl::aarch64::Assembler
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D | macro-assembler-aarch64.h | 4035 decp(rdn, pg); in Decp() 4042 decp(zd, pg); in Decp()
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 7195 void decp(const Register& rdn, const PRegisterWithLaneSize& pg) 7202 void decp(const ZRegister& zdn, const PRegister& pg)
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