| /external/llvm/test/CodeGen/X86/ |
| D | fdiv-combine.ll | 11 ; CHECK-NEXT: divss %xmm1, %xmm0
23 ; CHECK-NEXT: divss %xmm2, %xmm3
39 ; CHECK-NEXT: divss %xmm2, %xmm0
41 ; CHECK-NEXT: divss %xmm2, %xmm0
54 ; CHECK-NEXT: divss %xmm2, %xmm0
56 ; CHECK-NEXT: divss %xmm2, %xmm0
70 ; CHECK-NEXT: divss %xmm2, %xmm3
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| D | fold-load-binops.ll | 111 define <4 x float> @divss(<4 x float> %va, float* %pb) {
112 ; SSE-LABEL: divss:
114 ; SSE-NEXT: divss (%rdi), %xmm0
117 ; AVX-LABEL: divss:
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| D | recip-fastmath.ll | 5 ; If the target's divss/divps instructions are substantially
19 ; NORECIP-NEXT: divss
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| D | fold-xmm-zero.ll | 6 ; CHECK: divss LCPI0
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| D | sse-scalar-fp-arith.ll | 65 ; SSE-NEXT: divss %xmm1, %xmm0
248 ; SSE-NEXT: divss %xmm0, %xmm1
400 ; SSE-NEXT: divss %xmm1, %xmm2
401 ; SSE-NEXT: divss %xmm2, %xmm0
477 ; SSE-NEXT: divss %xmm1, %xmm0
615 ; SSE-NEXT: divss %xmm1, %xmm0
738 ; SSE-NEXT: divss %xmm0, %xmm1
863 ; SSE-NEXT: divss %xmm1, %xmm0
986 ; SSE-NEXT: divss %xmm0, %xmm1
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| D | fdiv.ll | 60 ; CHECK-NEXT: divss %xmm1, %xmm0
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| D | sqrt-fastmath.ll | 74 ; NORECIP-NEXT: divss %xmm1, %xmm0
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| D | machine-combiner.ll | 130 ; SSE-NEXT: divss %xmm1, %xmm0
152 ; SSE-NEXT: divss %xmm1, %xmm0
366 ; SSE-NEXT: divss %xmm1, %xmm0
390 ; SSE-NEXT: divss %xmm1, %xmm0
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| D | sse-intrinsics-x86.ll | 234 ; SSE-NEXT: divss %xmm1, %xmm0
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| D | stack-folding-fp-sse42.ll | 579 ;CHECK: divss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
587 ;CHECK: divss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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| D | sse-intrinsics-fast-isel.ll | 802 ; X32-NEXT: divss %xmm1, %xmm0
807 ; X64-NEXT: divss %xmm1, %xmm0
|
| /external/llvm/test/MC/X86/ |
| D | x86-32-coverage.s | 5613 divss 0xdeadbeef(%ebx,%ecx,8),%xmm5
5617 divss 0x45,%xmm5
5621 divss 0x7eed,%xmm5
5625 divss 0xbabecafe,%xmm5
5629 divss 0x12345678,%xmm5
5633 divss %xmm5,%xmm5
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerX8632.h | 514 void divss(Type Ty, XmmRegister dst, XmmRegister src);
515 void divss(Type Ty, XmmRegister dst, const AsmAddress &src);
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| D | IceAssemblerX8664.h | 533 void divss(Type Ty, XmmRegister dst, XmmRegister src);
534 void divss(Type Ty, XmmRegister dst, const AsmAddress &src);
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| D | IceAssemblerX8632.cpp | 551 void AssemblerX8632::divss(Type Ty, XmmRegister dst, XmmRegister src) { in divss() function in Ice::X8632::AssemblerX8632
559 void AssemblerX8632::divss(Type Ty, XmmRegister dst, const AsmAddress &src) { in divss() function in Ice::X8632::AssemblerX8632
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| D | IceAssemblerX8664.cpp | 597 void AssemblerX8664::divss(Type Ty, XmmRegister dst, XmmRegister src) { in divss() function in Ice::X8664::AssemblerX8664
606 void AssemblerX8664::divss(Type Ty, XmmRegister dst, const AsmAddress &src) { in divss() function in Ice::X8664::AssemblerX8664
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| D | IceInstX8632.h | 3492 &Assembler::divss, &Assembler::divss};
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| D | IceInstX8664.h | 3389 &Assembler::divss, &Assembler::divss};
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| /external/libaom/third_party/libyuv/source/ |
| D | x86inc.asm | 959 AVX_INSTR divss, 1, 0, 0
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| /external/libvpx/third_party/x86inc/ |
| D | x86inc.asm | 1554 AVX_INSTR divss, sse, 1, 0, 0
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| /external/libaom/third_party/x86inc/ |
| D | x86inc.asm | 1554 AVX_INSTR divss, sse, 1, 0, 0
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| /external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| D | XmmArith.cpp | 95 TestArithSSXmmXmm(FloatSize, Src, 7.0, Dst0, 70.0, divss, /); \ in TEST_F()
96 TestArithSSXmmAddr(FloatSize, 8.0, Dst1, 80.0, divss, /); \ in TEST_F()
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| /external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| D | XmmArith.cpp | 90 TestArithSSXmmXmm(FloatSize, Src, 7.0, Dst0, 70.0, divss, /); \ in TEST_F()
91 TestArithSSXmmAddr(FloatSize, 8.0, Dst1, 80.0, divss, /); \ in TEST_F()
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| /external/elfutils/tests/ |
| D | testfile44.expect.bz2 | 1testfile44.o: elf32-elf_i386
2
3Disassembly of section .text:
4
5 0 ... |
| /external/elfutils/libcpu/defs/ |
| D | i386 | 714 11110011,00001111,01011110,{Mod}{xmmreg}{R_m}:divss {Mod}{R_m},{xmmreg}
|