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Searched refs:ds_dec_rtn_u64 (Results 1 – 5 of 5) sorted by relevance

/external/llvm/test/MC/AMDGPU/
Dds.s381 ds_dec_rtn_u64 v[8:9] v2, v[4:5] label
/external/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.atomic.dec.ll256 ; GCN: ds_dec_rtn_u64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}}{{$}}
266 ; GCN: ds_dec_rtn_u64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}} offset:32
365 ; GCN: ds_dec_rtn_u64 v{{\[[0-9]+:[0-9]+\]}}, [[PTR]], v{{\[[0-9]+:[0-9]+\]}} offset:16
/external/llvm/test/MC/Disassembler/AMDGPU/
Dds_vi.txt270 # VI: ds_dec_rtn_u64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xc8,0xd8,0x02,0x04,0x00,0x08]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DDSInstructions.td472 defm DS_DEC_RTN_U64 : DS_1A1D_RET_mc<"ds_dec_rtn_u64", VReg_64, "ds_dec_u64">;
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td870 defm DS_DEC_RTN_U64 : DS_1A1D_RET <0x64, "ds_dec_rtn_u64", VReg_64, "ds_dec_u64">;