Searched refs:ds_xor_rtn_b64 (Results 1 – 6 of 6) sorted by relevance
/external/llvm/test/MC/AMDGPU/ |
D | ds.s | 409 ds_xor_rtn_b64 v[8:9], v2, v[4:5] label
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/external/llvm/test/CodeGen/AMDGPU/ |
D | local-atomics64.ll | 150 ; GCN: ds_xor_rtn_b64 159 ; GCN: ds_xor_rtn_b64 {{.*}} offset:32
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 291 # VI: ds_xor_rtn_b64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xd6,0xd8,0x02,0x04,0x00,0x08]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | DSInstructions.td | 479 defm DS_XOR_RTN_B64 : DS_1A1D_RET_mc<"ds_xor_rtn_b64", VReg_64, "ds_xor_b64">;
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 877 defm DS_XOR_RTN_B64 : DS_1A1D_RET <0x6b, "ds_xor_rtn_b64", VReg_64, "ds_xor_b64">;
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/external/mesa3d/src/amd/compiler/ |
D | aco_instruction_selection.cpp | 6769 op64_rtn = aco_opcode::ds_xor_rtn_b64; in visit_shared_atomic()
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