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Searched refs:elements_gt_96 (Results 1 – 6 of 6) sorted by relevance

/external/XNNPACK/test/
Df16-raddstoreexpminusmax.cc675 TEST(F16_RADDSTOREEXPMINUSMAX__NEONFP16ARITH_RR2_P2_X96, elements_gt_96) { in TEST() argument
712 TEST(F16_RADDSTOREEXPMINUSMAX__NEONFP16ARITH_RR2_P2_X96_ACC2, elements_gt_96) { in TEST() argument
749 TEST(F16_RADDSTOREEXPMINUSMAX__NEONFP16ARITH_RR2_P2_X96_ACC3, elements_gt_96) { in TEST() argument
786 TEST(F16_RADDSTOREEXPMINUSMAX__NEONFP16ARITH_RR2_P2_X96_ACC6, elements_gt_96) { in TEST() argument
1452 TEST(F16_RADDSTOREEXPMINUSMAX__AVX2_RR1_P2_X96, elements_gt_96) { in TEST() argument
1489 TEST(F16_RADDSTOREEXPMINUSMAX__AVX2_RR1_P2_X96_ACC2, elements_gt_96) { in TEST() argument
1526 TEST(F16_RADDSTOREEXPMINUSMAX__AVX2_RR1_P2_X96_ACC3, elements_gt_96) { in TEST() argument
1563 TEST(F16_RADDSTOREEXPMINUSMAX__AVX2_RR1_P2_X96_ACC6, elements_gt_96) { in TEST() argument
Df32-raddexpminusmax.cc342 TEST(F32_RADDEXPMINUSMAX__AVX2_P5_X96, elements_gt_96) { in TEST() argument
379 TEST(F32_RADDEXPMINUSMAX__AVX2_P5_X96_ACC2, elements_gt_96) { in TEST() argument
416 TEST(F32_RADDEXPMINUSMAX__AVX2_P5_X96_ACC3, elements_gt_96) { in TEST() argument
453 TEST(F32_RADDEXPMINUSMAX__AVX2_P5_X96_ACC6, elements_gt_96) { in TEST() argument
Df32-raddextexp.cc342 TEST(F32_RADDEXTEXP__AVX2_P5_X96, elements_gt_96) { in TEST() argument
379 TEST(F32_RADDEXTEXP__AVX2_P5_X96_ACC2, elements_gt_96) { in TEST() argument
416 TEST(F32_RADDEXTEXP__AVX2_P5_X96_ACC3, elements_gt_96) { in TEST() argument
453 TEST(F32_RADDEXTEXP__AVX2_P5_X96_ACC6, elements_gt_96) { in TEST() argument
Df32-vscaleextexp.cc453 TEST(F32_VSCALEEXTEXP__AVX2_P5_X96, elements_gt_96) { in TEST() argument
675 TEST(F32_VSCALEEXTEXP__AVX512F_P5_SCALEF_X96, elements_gt_96) { in TEST() argument
Df32-vscaleexpminusmax.cc607 TEST(F32_VSCALEEXPMINUSMAX__AVX2_P5_X96, elements_gt_96) { in TEST() argument
913 TEST(F32_VSCALEEXPMINUSMAX__AVX512F_P5_SCALEF_X96, elements_gt_96) { in TEST() argument
Df32-raddstoreexpminusmax.cc2562 TEST(F32_RADDSTOREEXPMINUSMAX__AVX2_RR1_P5_X96, elements_gt_96) { in TEST() argument
2599 TEST(F32_RADDSTOREEXPMINUSMAX__AVX2_RR1_P5_X96_ACC2, elements_gt_96) { in TEST() argument
2636 TEST(F32_RADDSTOREEXPMINUSMAX__AVX2_RR1_P5_X96_ACC3, elements_gt_96) { in TEST() argument
2673 TEST(F32_RADDSTOREEXPMINUSMAX__AVX2_RR1_P5_X96_ACC6, elements_gt_96) { in TEST() argument