/external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
D | valid-xfail-mips64r3.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 56 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
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/external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
D | valid-xfail-mips64r2.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 56 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
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/external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
D | valid-xfail-mips64r5.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 56 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
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/external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
D | valid-xfail-mips32r3.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 68 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 71 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 [all …]
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/external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
D | valid-xfail-mips32r2.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 68 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 71 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 [all …]
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/external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
D | valid-xfail-mips32r5.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 32 0x46 0xcc 0xc6 0x00 # CHECK: add.ps $f24, $f24, $f12 62 0x46 0xc9 0xc5 0x11 # CHECK: movt.ps $f20, $f24, $fcc2 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 68 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30 71 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2 [all …]
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/external/llvm/test/MC/Disassembler/Mips/mips32/ |
D | valid-xfail-mips32.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24
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/external/llvm/test/MC/Disassembler/Mips/mips4/ |
D | valid-xfail-mips4.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 38 0x4f 0x04 0x98 0x78 # CHECK: nmsub.s $f1, $f24, $f19, $f4
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/external/llvm/test/MC/Disassembler/Mips/mips64/ |
D | valid-mips64-xfail.txt | 4 0x46 0x11 0xc5 0x32 # CHECK: c.eq.s $fcc5, $f24, $f17 8 0x46 0x04 0xc6 0x3e # CHECK: c.le.s $fcc6, $f24, $f4 15 0x46 0x27 0xc4 0x3f # CHECK: c.ngt.d $fcc4, $f24, $f7 28 0x46 0x0a 0xc7 0x35 # CHECK: c.ult.s $fcc7, $f24, $f10 29 0x46 0x38 0xbe 0x31 # CHECK: c.un.d $fcc6, $f23, $f24 71 0x4f 0x04 0x98 0x78 # CHECK: nmsub.s $f1, $f24, $f19, $f4 75 0x46 0xc2 0x4e 0x2f # CHECK: puu.ps $f24, $f9, $f2
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/external/linux-kselftest/tools/testing/selftests/powerpc/include/ |
D | fpu_asm.h | 18 stfd f24,(stack_size + STACK_FRAME_MIN_SIZE - 56)(%r1); \ 38 lfd f24,(stack_size + STACK_FRAME_MIN_SIZE - 56)(%r1); \ 65 lfd f24,80(r3)
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/external/skia/resources/sksl/runtime_errors/ |
D | ProgramTooLarge_StackDepth.rts | 37 void f24() { f25(); } 38 void f23() { f24(); } 88 void f24()
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/external/llvm/test/CodeGen/PowerPC/ |
D | vsx-spill.ll | 10 …3},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f2… 31 …3},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f2… 51 …3},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f2…
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/external/google-breakpad/src/common/android/include/asm-mips/ |
D | fpregdef.h | 60 #define fs2 $f24 103 #define fs0 $f24
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/external/skia/resources/sksl/runtime/ |
D | LargeProgram_StackDepth.rts | 34 void f24() { f25(); } 35 void f23() { f24(); }
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/external/swiftshader/third_party/marl/src/ |
D | osfiber_asm_mips64.h | 63 uintptr_t f24; member 100 static_assert(offsetof(marl_fiber_context, f24) == MARL_REG_f24,
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D | osfiber_asm_mips64.S | 40 s.d $f24, MARL_REG_f24($a0) 66 l.d $f24, MARL_REG_f24($v0)
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/external/llvm/test/MC/Mips/mips32/ |
D | invalid-mips32r2.s | 8 …cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 19 …mfhc1 $s8,$f24 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat… 26 …nmsub.s $f1,$f24,$f19,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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/external/llvm/test/CodeGen/Mips/ |
D | no-odd-spreg-msa.ll | 26 …~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{… 60 …~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{… 90 …~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{… 118 …~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{…
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/external/llvm/test/CodeGen/Mips/cconv/ |
D | callee-saved-float.ll | 28 …~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{… 59 ; O32-DAG: sdc1 [[F24:\$f24]], [[OFF24:[0-9]+]]($sp) 78 ; N32-DAG: sdc1 [[F24:\$f24]], [[OFF24:[0-9]+]]($sp) 97 ; N64-DAG: sdc1 [[F24:\$f24]], [[OFF24:[0-9]+]]($sp)
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/external/llvm/test/MC/ARM/ |
D | symbol-variants.s | 82 .word f24(TLSDESC) 84 @ CHECK: 60 R_ARM_TLS_GOTDESC f24
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/external/llvm/test/MC/Mips/mips64/ |
D | valid.s | 12 add.s $f8,$f21,$f24 59 cvt.l.d $f24,$f15 65 cvt.w.s $f20,$f24 159 madd.s $f2, $f30, $f18, $f24 # encoding: [0x4f,0xd8,0x90,0xa0] 204 nmadd.s $f0, $f4, $f24, $f12 # encoding: [0x4c,0x8c,0xc0,0x30] 206 nmsub.s $f0, $f24, $f20, $f4 # encoding: [0x4f,0x04,0xa0,0x38]
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/external/llvm/test/MC/Mips/mips4/ |
D | valid.s | 12 add.s $f8,$f21,$f24 57 cvt.l.d $f24,$f15 63 cvt.w.s $f20,$f24 147 madd.s $f2, $f30, $f18, $f24 # encoding: [0x4f,0xd8,0x90,0xa0] 187 nmadd.s $f0, $f4, $f24, $f12 # encoding: [0x4c,0x8c,0xc0,0x30] 189 nmsub.s $f0, $f24, $f20, $f4 # encoding: [0x4f,0x04,0xa0,0x38]
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/external/llvm/test/MC/Mips/mips5/ |
D | valid.s | 12 add.s $f8,$f21,$f24 57 cvt.l.d $f24,$f15 63 cvt.w.s $f20,$f24 148 madd.s $f2, $f30, $f18, $f24 # encoding: [0x4f,0xd8,0x90,0xa0] 188 nmadd.s $f0, $f4, $f24, $f12 # encoding: [0x4c,0x8c,0xc0,0x30] 190 nmsub.s $f0, $f24, $f20, $f4 # encoding: [0x4f,0x04,0xa0,0x38]
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/external/llvm/test/MC/Mips/mips32r2/ |
D | valid.s | 12 add.s $f8,$f21,$f24 56 cvt.l.d $f24,$f15 61 cvt.w.s $f20,$f24 109 mfhc1 $s8,$f24 153 nmsub.s $f1,$f24,$f19,$f4
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/external/llvm/test/MC/Mips/mips32r5/ |
D | valid.s | 12 add.s $f8,$f21,$f24 56 cvt.l.d $f24,$f15 61 cvt.w.s $f20,$f24 110 mfhc1 $s8,$f24 154 nmsub.s $f1,$f24,$f19,$f4
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