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Searched refs:fcvtmu (Results 1 – 25 of 41) sorted by relevance

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/external/llvm/test/MC/AArch64/
Dneon-scalar-cvt.s130 fcvtmu h12, h13
131 fcvtmu s12, s13
132 fcvtmu d21, d14
Darm64-fp-encoding.s308 fcvtmu w1, h2
309 fcvtmu w1, s2
310 fcvtmu w1, d2
311 fcvtmu x1, h2
312 fcvtmu x1, s2
313 fcvtmu x1, d2
315 ; FP16: fcvtmu w1, h2 ; encoding: [0x41,0x00,0xf1,0x1e]
317 ; NO-FP16-NEXT: fcvtmu w1, h2
318 ; CHECK: fcvtmu w1, s2 ; encoding: [0x41,0x00,0x31,0x1e]
319 ; CHECK: fcvtmu w1, d2 ; encoding: [0x41,0x00,0x71,0x1e]
[all …]
Dneon-simd-misc.s609 fcvtmu v4.4h, v0.4h
610 fcvtmu v6.8h, v8.8h
611 fcvtmu v6.4s, v8.4s
612 fcvtmu v6.2d, v8.2d
613 fcvtmu v4.2s, v0.2s
Dfullfp16-neon-neg.s236 fcvtmu h12, h13
350 fcvtmu v4.4h, v0.4h
352 fcvtmu v6.8h, v8.8h
Darm64-advsimd.s826 fcvtmu.2s v0, v0
827 fcvtmu.4s v0, v0
828 fcvtmu.2d v0, v0
829 fcvtmu s0, s0
830 fcvtmu d0, d0 define
832 ; CHECK: fcvtmu.2s v0, v0 ; encoding: [0x00,0xb8,0x21,0x2e]
833 ; CHECK: fcvtmu.4s v0, v0 ; encoding: [0x00,0xb8,0x21,0x6e]
834 ; CHECK: fcvtmu.2d v0, v0 ; encoding: [0x00,0xb8,0x61,0x6e]
835 ; CHECK: fcvtmu s0, s0 ; encoding: [0x00,0xb8,0x21,0x7e]
836 ; CHECK: fcvtmu d0, d0 ; encoding: [0x00,0xb8,0x61,0x7e]
Dneon-diagnostics.s5916 fcvtmu v0.16b, v31.16b
5917 fcvtmu v2.8h, v4.8h
5918 fcvtmu v1.8b, v9.8b
5919 fcvtmu v13.4h, v21.4h
7222 fcvtmu s0, d0
7223 fcvtmu d0, s0 define
Dbasic-a64-instructions.s2088 fcvtmu w6, s7
2089 fcvtmu x8, s9
2142 fcvtmu w6, d7
2143 fcvtmu x8, d9
/external/llvm/test/CodeGen/AArch64/
Darm64-cvt.ll128 ;CHECK: fcvtmu w0, s0
130 %tmp3 = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float %A)
136 ;CHECK: fcvtmu x0, s0
138 %tmp3 = call i64 @llvm.aarch64.neon.fcvtmu.i64.f32(float %A)
144 ;CHECK: fcvtmu w0, d0
146 %tmp3 = call i32 @llvm.aarch64.neon.fcvtmu.i32.f64(double %A)
152 ;CHECK: fcvtmu x0, d0
154 %tmp3 = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double %A)
158 declare i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float) nounwind readnone
159 declare i64 @llvm.aarch64.neon.fcvtmu.i64.f32(float) nounwind readnone
[all …]
Dround-conv.ll44 ; CHECK: fcvtmu w0, s0
54 ; CHECK: fcvtmu x0, s0
64 ; CHECK: fcvtmu w0, d0
74 ; CHECK: fcvtmu x0, d0
Darm64-vcvt.ll99 ;CHECK: fcvtmu.2s v0, v0
101 %tmp3 = call <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float> %A)
108 ;CHECK: fcvtmu.4s v0, v0
110 %tmp3 = call <4 x i32> @llvm.aarch64.neon.fcvtmu.v4i32.v4f32(<4 x float> %A)
117 ;CHECK: fcvtmu.2d v0, v0
119 %tmp3 = call <2 x i64> @llvm.aarch64.neon.fcvtmu.v2i64.v2f64(<2 x double> %A)
123 declare <2 x i32> @llvm.aarch64.neon.fcvtmu.v2i32.v2f32(<2 x float>) nounwind readnone
124 declare <4 x i32> @llvm.aarch64.neon.fcvtmu.v4i32.v4f32(<4 x float>) nounwind readnone
125 declare <2 x i64> @llvm.aarch64.neon.fcvtmu.v2i64.v2f64(<2 x double>) nounwind readnone
/external/capstone/suite/MC/AArch64/
Dneon-scalar-cvt.s.cs21 0xac,0xb9,0x21,0x7e = fcvtmu s12, s13
22 0xd5,0xb9,0x61,0x7e = fcvtmu d21, d14
Dneon-simd-misc.s.cs180 0x06,0xb9,0x21,0x6e = fcvtmu v6.4s, v8.4s
181 0x06,0xb9,0x61,0x6e = fcvtmu v6.2d, v8.2d
182 0x04,0xb8,0x21,0x2e = fcvtmu v4.2s, v0.2s
Dbasic-a64-instructions.s.cs815 0xe6,0x00,0x31,0x1e = fcvtmu w6, s7
816 0x28,0x01,0x31,0x9e = fcvtmu x8, s9
839 0xe6,0x00,0x71,0x1e = fcvtmu w6, d7
840 0x28,0x01,0x71,0x9e = fcvtmu x8, d9
/external/vixl/test/aarch64/
Dtest-disasm-fp-aarch64.cc343 COMPARE(fcvtmu(w8, s9), "fcvtmu w8, s9"); in TEST()
344 COMPARE(fcvtmu(x10, s11), "fcvtmu x10, s11"); in TEST()
345 COMPARE(fcvtmu(w12, d13), "fcvtmu w12, d13"); in TEST()
346 COMPARE(fcvtmu(x14, d15), "fcvtmu x14, d15"); in TEST()
383 COMPARE(fcvtmu(w8, h9), "fcvtmu w8, h9"); in TEST()
384 COMPARE(fcvtmu(x10, h11), "fcvtmu x10, h11"); in TEST()
Dtest-cpu-features-aarch64.cc561 TEST_FP(fcvtmu_0, fcvtmu(w0, d1))
562 TEST_FP(fcvtmu_1, fcvtmu(w0, s1))
563 TEST_FP(fcvtmu_2, fcvtmu(x0, d1))
564 TEST_FP(fcvtmu_3, fcvtmu(x0, s1))
3191 TEST_FP_NEON(fcvtmu_0, fcvtmu(v0.V2S(), v1.V2S()))
3192 TEST_FP_NEON(fcvtmu_1, fcvtmu(v0.V4S(), v1.V4S()))
3193 TEST_FP_NEON(fcvtmu_2, fcvtmu(v0.V2D(), v1.V2D()))
3194 TEST_FP_NEON(fcvtmu_3, fcvtmu(s0, s1))
3195 TEST_FP_NEON(fcvtmu_4, fcvtmu(d0, d1))
3463 TEST_FP_FPHALF(fcvtmu_0, fcvtmu(w0, h1))
[all …]
Dtest-trace-aarch64.cc466 __ fcvtmu(d27, d0); in GenerateTestSequenceFP() local
467 __ fcvtmu(s8, s22); in GenerateTestSequenceFP() local
468 __ fcvtmu(w29, d19); in GenerateTestSequenceFP() local
469 __ fcvtmu(w26, s0); in GenerateTestSequenceFP() local
470 __ fcvtmu(x13, d5); in GenerateTestSequenceFP() local
471 __ fcvtmu(x5, s18); in GenerateTestSequenceFP() local
2578 __ fcvtmu(v13.V2D(), v1.V2D()); in GenerateTestSequenceNEONFP() local
2579 __ fcvtmu(v26.V2S(), v12.V2S()); in GenerateTestSequenceNEONFP() local
2580 __ fcvtmu(v21.V4S(), v21.V4S()); in GenerateTestSequenceNEONFP() local
Dtest-simulator-aarch64.cc2958 DEFINE_TEST_FP_TO_INT(fcvtmu, FPToU, Conversions) in DEFINE_TEST_FP_TO_INT()
4845 DEFINE_TEST_NEON_2SAME_FP_FP16(fcvtmu, Conversions) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
4891 DEFINE_TEST_NEON_2SAME_FP_FP16_SCALAR(fcvtmu, Conversions) in DEFINE_TEST_NEON_2SAME_FP_FP16_SCALAR()
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour387 0x~~~~~~~~~~~~~~~~ 7e61b81b fcvtmu d27, d0
388 0x~~~~~~~~~~~~~~~~ 7e21bac8 fcvtmu s8, s22
389 0x~~~~~~~~~~~~~~~~ 1e71027d fcvtmu w29, d19
390 0x~~~~~~~~~~~~~~~~ 1e31001a fcvtmu w26, s0
391 0x~~~~~~~~~~~~~~~~ 9e7100ad fcvtmu x13, d5
392 0x~~~~~~~~~~~~~~~~ 9e310245 fcvtmu x5, s18
2224 0x~~~~~~~~~~~~~~~~ 6e61b82d fcvtmu v13.2d, v1.2d
2225 0x~~~~~~~~~~~~~~~~ 2e21b99a fcvtmu v26.2s, v12.2s
2226 0x~~~~~~~~~~~~~~~~ 6e21bab5 fcvtmu v21.4s, v21.4s
Dlog-disasm387 0x~~~~~~~~~~~~~~~~ 7e61b81b fcvtmu d27, d0
388 0x~~~~~~~~~~~~~~~~ 7e21bac8 fcvtmu s8, s22
389 0x~~~~~~~~~~~~~~~~ 1e71027d fcvtmu w29, d19
390 0x~~~~~~~~~~~~~~~~ 1e31001a fcvtmu w26, s0
391 0x~~~~~~~~~~~~~~~~ 9e7100ad fcvtmu x13, d5
392 0x~~~~~~~~~~~~~~~~ 9e310245 fcvtmu x5, s18
2224 0x~~~~~~~~~~~~~~~~ 6e61b82d fcvtmu v13.2d, v1.2d
2225 0x~~~~~~~~~~~~~~~~ 2e21b99a fcvtmu v26.2s, v12.2s
2226 0x~~~~~~~~~~~~~~~~ 6e21bab5 fcvtmu v21.4s, v21.4s
Dlog-cpufeatures-custom386 0x~~~~~~~~~~~~~~~~ 7e61b81b fcvtmu d27, d0 ### {FP, NEON} ###
387 0x~~~~~~~~~~~~~~~~ 7e21bac8 fcvtmu s8, s22 ### {FP, NEON} ###
388 0x~~~~~~~~~~~~~~~~ 1e71027d fcvtmu w29, d19 ### {FP} ###
389 0x~~~~~~~~~~~~~~~~ 1e31001a fcvtmu w26, s0 ### {FP} ###
390 0x~~~~~~~~~~~~~~~~ 9e7100ad fcvtmu x13, d5 ### {FP} ###
391 0x~~~~~~~~~~~~~~~~ 9e310245 fcvtmu x5, s18 ### {FP} ###
2223 0x~~~~~~~~~~~~~~~~ 6e61b82d fcvtmu v13.2d, v1.2d ### {FP, NEON} ###
2224 0x~~~~~~~~~~~~~~~~ 2e21b99a fcvtmu v26.2s, v12.2s ### {FP, NEON} ###
2225 0x~~~~~~~~~~~~~~~~ 6e21bab5 fcvtmu v21.4s, v21.4s ### {FP, NEON} ###
Dlog-cpufeatures386 0x~~~~~~~~~~~~~~~~ 7e61b81b fcvtmu d27, d0 // Needs: FP, NEON
387 0x~~~~~~~~~~~~~~~~ 7e21bac8 fcvtmu s8, s22 // Needs: FP, NEON
388 0x~~~~~~~~~~~~~~~~ 1e71027d fcvtmu w29, d19 // Needs: FP
389 0x~~~~~~~~~~~~~~~~ 1e31001a fcvtmu w26, s0 // Needs: FP
390 0x~~~~~~~~~~~~~~~~ 9e7100ad fcvtmu x13, d5 // Needs: FP
391 0x~~~~~~~~~~~~~~~~ 9e310245 fcvtmu x5, s18 // Needs: FP
2223 0x~~~~~~~~~~~~~~~~ 6e61b82d fcvtmu v13.2d, v1.2d // Needs: FP, NEON
2224 0x~~~~~~~~~~~~~~~~ 2e21b99a fcvtmu v26.2s, v12.2s // Needs: FP, NEON
2225 0x~~~~~~~~~~~~~~~~ 6e21bab5 fcvtmu v21.4s, v21.4s // Needs: FP, NEON
Dlog-cpufeatures-colour386 0x~~~~~~~~~~~~~~~~ 7e61b81b fcvtmu d27, d0 FP, NEON
387 0x~~~~~~~~~~~~~~~~ 7e21bac8 fcvtmu s8, s22 FP, NEON
388 0x~~~~~~~~~~~~~~~~ 1e71027d fcvtmu w29, d19 FP
389 0x~~~~~~~~~~~~~~~~ 1e31001a fcvtmu w26, s0 FP
390 0x~~~~~~~~~~~~~~~~ 9e7100ad fcvtmu x13, d5 FP
391 0x~~~~~~~~~~~~~~~~ 9e310245 fcvtmu x5, s18 FP
2223 0x~~~~~~~~~~~~~~~~ 6e61b82d fcvtmu v13.2d, v1.2d FP, NEON
2224 0x~~~~~~~~~~~~~~~~ 2e21b99a fcvtmu v26.2s, v12.2s FP, NEON
2225 0x~~~~~~~~~~~~~~~~ 6e21bab5 fcvtmu v21.4s, v21.4s FP, NEON
Dlog-all1177 0x~~~~~~~~~~~~~~~~ 7e61b81b fcvtmu d27, d0
1179 0x~~~~~~~~~~~~~~~~ 7e21bac8 fcvtmu s8, s22
1181 0x~~~~~~~~~~~~~~~~ 1e71027d fcvtmu w29, d19
1183 0x~~~~~~~~~~~~~~~~ 1e31001a fcvtmu w26, s0
1185 0x~~~~~~~~~~~~~~~~ 9e7100ad fcvtmu x13, d5
1187 0x~~~~~~~~~~~~~~~~ 9e310245 fcvtmu x5, s18
9702 0x~~~~~~~~~~~~~~~~ 6e61b82d fcvtmu v13.2d, v1.2d
9704 0x~~~~~~~~~~~~~~~~ 2e21b99a fcvtmu v26.2s, v12.2s
9706 0x~~~~~~~~~~~~~~~~ 6e21bab5 fcvtmu v21.4s, v21.4s
/external/capstone/arch/AArch64/
DAArch64MappingInsnOp.inc1545 { /* AArch64_FCVTMUUWDr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
1549 { /* AArch64_FCVTMUUWSr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
1553 { /* AArch64_FCVTMUUXDr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
1557 { /* AArch64_FCVTMUUXSr, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
1561 { /* AArch64_FCVTMUv1i32, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
1565 { /* AArch64_FCVTMUv1i64, ARM64_INS_FCVTMU: fcvtmu $rd, $rn */
1569 { /* AArch64_FCVTMUv2f32, ARM64_INS_FCVTMU: fcvtmu.2s $rd, $rn */
1573 { /* AArch64_FCVTMUv2f64, ARM64_INS_FCVTMU: fcvtmu.2d $rd, $rn */
1577 { /* AArch64_FCVTMUv4f32, ARM64_INS_FCVTMU: fcvtmu.4s $rd, $rn */
/external/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt1712 # FP16: fcvtmu w6, h7
1713 # FP16: fcvtmu x8, h9
1766 # CHECK: fcvtmu w6, s7
1767 # CHECK: fcvtmu x8, s9
1820 # CHECK: fcvtmu w6, d7
1821 # CHECK: fcvtmu x8, d9

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