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Searched refs:fcvtx (Results 1 – 8 of 8) sorted by relevance

/external/vixl/test/aarch64/
Dtest-api-movprfx-aarch64.cc2019 __ fcvtx(z14.VnS(), p4.Merging(), z0.VnD()); in TEST() local
3206 __ fcvtx(z14.VnS(), p4.Merging(), z14.VnD()); in TEST() local
3586 __ fcvtx(z14.VnS(), p4.Merging(), z0.VnD()); in TEST() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td1521 defm FCVTX_ZPmZ : sve2_fp_convert_down_odd_rounding<"fcvtx", "int_aarch64_sve_fcvtx">;
/external/vixl/src/aarch64/
Dassembler-aarch64.h5988 void fcvtx(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn);
Dassembler-sve-aarch64.cc7008 void Assembler::fcvtx(const ZRegister& zd, in fcvtx() function in vixl::aarch64::Assembler
Dmacro-assembler-aarch64.h6504 fcvtx(zd, pg.Merging(), zn); in Fcvtx()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12501 "tnu\006fcvtps\006fcvtpu\005fcvtx\006fcvtxn\007fcvtxn2\007fcvtxnt\006fcv"
14062 …{ 1285 /* fcvtx */, AArch64::FCVTX_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bA…
21435 …{ 1285 /* fcvtx */, AArch64::FCVTX_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bA…
29995 { 1285 /* fcvtx */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE2 },
29996 { 1285 /* fcvtx */, 1 /* 0 */, MCK_SVEVectorSReg, AMFBS_HasSVE2 },
29997 { 1285 /* fcvtx */, 16 /* 4 */, MCK_SVEVectorDReg, AMFBS_HasSVE2 },
29998 { 1285 /* fcvtx */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE2 },
29999 { 1285 /* fcvtx */, 1 /* 0 */, MCK_SVEVectorSReg, AMFBS_HasSVE2 },
30000 { 1285 /* fcvtx */, 16 /* 4 */, MCK_SVEVectorDReg, AMFBS_HasSVE2 },
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md7616 void fcvtx(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn)
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc590 "llvm.aarch64.sve.fcvtx.f32f64",
10723 1, // llvm.aarch64.sve.fcvtx.f32f64