Searched refs:fdup (Results 1 – 7 of 7) sorted by relevance
/external/vixl/src/aarch64/ |
D | macro-assembler-sve-aarch64.cc | 836 fdup(zd, imm); in Fdup() 854 fdup(zd, imm); in Fdup() 872 fdup(zd, imm); in Fdup()
|
D | assembler-aarch64.h | 4237 void fdup(const ZRegister& zd, double imm); 4240 void fdup(const ZRegister& zd, Float16 imm) { in fdup() function 4241 fdup(zd, FPToDouble(imm, kIgnoreDefaultNaN)); in fdup()
|
D | assembler-sve-aarch64.cc | 3644 void Assembler::fdup(const ZRegister& zd, double imm) { in fdup() function in vixl::aarch64::Assembler 6510 fdup(zd, imm); in fmov()
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SVEInstrInfo.td | 247 defm FDUP_ZI : sve_int_dup_fpimm<"fdup">;
|
/external/vixl/test/aarch64/ |
D | test-disasm-sve-aarch64.cc | 3140 COMPARE(fdup(z26.VnH(), Float16(-5.0f)), "fmov z26.h, #0x94 (-5.0000)"); in TEST() 3141 COMPARE(fdup(z27.VnS(), -13.0f), "fmov z27.s, #0xaa (-13.0000)"); in TEST() 3142 COMPARE(fdup(z28.VnD(), 1.0f), "fmov z28.d, #0x70 (1.0000)"); in TEST()
|
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenAsmMatcher.inc | 12502 "tzs\006fcvtzu\004fdiv\005fdivr\004fdup\005fexpa\007fjcvtzs\005flogb\004" 14151 …{ 1339 /* fdup */, AArch64::FDUP_ZI_H, Convert__SVEVectorHReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SV… 14152 …{ 1339 /* fdup */, AArch64::FDUP_ZI_S, Convert__SVEVectorSReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SV… 14153 …{ 1339 /* fdup */, AArch64::FDUP_ZI_D, Convert__SVEVectorDReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SV… 21524 …{ 1339 /* fdup */, AArch64::FDUP_ZI_H, Convert__SVEVectorHReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SV… 21525 …{ 1339 /* fdup */, AArch64::FDUP_ZI_S, Convert__SVEVectorSReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SV… 21526 …{ 1339 /* fdup */, AArch64::FDUP_ZI_D, Convert__SVEVectorDReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SV… 30103 { 1339 /* fdup */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE }, 30104 { 1339 /* fdup */, 1 /* 0 */, MCK_SVEVectorHReg, AMFBS_HasSVE }, 30105 { 1339 /* fdup */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE }, [all …]
|
/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 7664 void fdup(const ZRegister& zd, double imm) 7671 void fdup(const ZRegister& zd, Float16 imm)
|