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Searched refs:flat_load_dwordx2 (Results 1 – 16 of 16) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Dinline-constraints.ll6 ; GCN: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
16 …%v64 = tail call <2 x i32> asm sideeffect "flat_load_dwordx2 $0, $1", "=v,v"(i32 addrspace(1)* %pt…
Dload-global-i16.ll35 ; GCN-HSA: flat_load_dwordx2 v
48 ; GCN-HSA: flat_load_dwordx2
168 ; GCN-HSA: flat_load_dwordx2
179 ; GCN-HSA: flat_load_dwordx2
191 ; GCN-HSA: flat_load_dwordx2
207 ; GCN-HSA: flat_load_dwordx2
Dload-global-f32.ll22 ; GCN-HSA: flat_load_dwordx2
Dload-global-f64.ll9 ; GCN-HSA: flat_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]]
Dload-global-i32.ll21 ; GCN-HSA: flat_load_dwordx2
157 ; GCN-HSA: flat_load_dwordx2
168 ; GCN-HSA: flat_load_dwordx2
Dload-global-i64.ll12 ; GCN-HSA: flat_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]]
Dflat-address-space.ll73 ; CHECK: flat_load_dwordx2
Dflat_atomics_i64.ll805 ; GCN: flat_load_dwordx2 [[RET:v\[[0-9]+:[0-9]\]]], v[{{[0-9]+}}:{{[0-9]+}}] glc{{$}}
816 ; GCN: flat_load_dwordx2 [[RET:v\[[0-9]+:[0-9]\]]], v[{{[0-9]+}}:{{[0-9]+}}] glc
826 ; GCN: flat_load_dwordx2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}] glc{{$}}
838 ; GCN: flat_load_dwordx2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}] glc{{$}}
Dglobal_atomics_i64.ll953 ; VI: flat_load_dwordx2 [[RET:v\[[0-9]+:[0-9]\]]], v[{{[0-9]+}}:{{[0-9]+}}] glc{{$}}
965 ; VI: flat_load_dwordx2 [[RET:v\[[0-9]+:[0-9]\]]], v[{{[0-9]+}}:{{[0-9]+}}] glc
976 ; VI: flat_load_dwordx2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}] glc{{$}}
989 ; VI: flat_load_dwordx2 [[RET:v\[[0-9]+:[0-9]+\]]], v[{{[0-9]+:[0-9]+}}] glc{{$}}
Dsalu-to-valu.ll135 ; GCN-HSA: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
Dload-global-i8.ll58 ; GCN-HSA: flat_load_dwordx2
/external/llvm/test/MC/AMDGPU/
Dflat.s159 flat_load_dwordx2 v[1:2], v[3:4] label
/external/llvm/lib/Target/AMDGPU/
DCIInstructions.td129 flat<0xd, 0x15>, "flat_load_dwordx2", VReg_64
/external/llvm/test/MC/Disassembler/AMDGPU/
Dflat_vi.txt60 # VI: flat_load_dwordx2 v[1:2], v[3:4] ; encoding: [0x00,0x00,0x54,0xdc,0x03,0x00,0x00,0x01]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DFLATInstructions.td384 def FLAT_LOAD_DWORDX2 : FLAT_Load_Pseudo <"flat_load_dwordx2", VReg_64>;
/external/mesa3d/src/amd/compiler/
Daco_instruction_selection.cpp3489 …de::buffer_load_dwordx2 : global ? aco_opcode::global_load_dwordx2 : aco_opcode::flat_load_dwordx2; in global_load_callback()
7624 sample_pos = bld.flat(aco_opcode::flat_load_dwordx2, bld.def(v2), addr, Operand(s1)); in visit_intrinsic()