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Searched refs:flat_load_dwordx4 (Results 1 – 16 of 16) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Dload-global-f64.ll19 ; GCN-HSA: flat_load_dwordx4
30 ; GCN-HSA: flat_load_dwordx4
31 ; GCN-HSA: flat_load_dwordx4
43 ; GCN-HSA: flat_load_dwordx4
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58 ; GCN-HSA: flat_load_dwordx4
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Dload-global-i64.ll24 ; GCN-HSA: flat_load_dwordx4
38 ; GCN-HSA: flat_load_dwordx4
39 ; GCN-HSA: flat_load_dwordx4
54 ; GCN-HSA: flat_load_dwordx4
55 ; GCN-HSA: flat_load_dwordx4
72 ; GCN-HSA: flat_load_dwordx4
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75 ; GCN-HSA: flat_load_dwordx4
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Dload-global-i32.ll33 ; GCN-HSA: flat_load_dwordx4
45 ; GCN-HSA: flat_load_dwordx4
58 ; GCN-HSA: flat_load_dwordx4
59 ; GCN-HSA: flat_load_dwordx4
76 ; GCN-HSA: flat_load_dwordx4
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Dload-global-f32.ll34 ; GCN-HSA: flat_load_dwordx4
46 ; GCN-HSA: flat_load_dwordx4
59 ; GCN-HSA: flat_load_dwordx4
60 ; GCN-HSA: flat_load_dwordx4
77 ; GCN-HSA: flat_load_dwordx4
78 ; GCN-HSA: flat_load_dwordx4
79 ; GCN-HSA: flat_load_dwordx4
80 ; GCN-HSA: flat_load_dwordx4
Dload-global-i16.ll60 ; GCN-HSA: flat_load_dwordx4
74 ; GCN-HSA: flat_load_dwordx4
75 ; GCN-HSA: flat_load_dwordx4
230 ; GCN-HSA: flat_load_dwordx4
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275 ; GCN-HSA: flat_load_dwordx4
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Dsalu-to-valu.ll157 ; GCN-HSA: flat_load_dwordx4 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
192 ; GCN-HSA: flat_load_dwordx4
193 ; GCN-HSA: flat_load_dwordx4
229 ; GCN-HSA: flat_load_dwordx4
230 ; GCN-HSA: flat_load_dwordx4
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293 ; GCN-HSA: flat_load_dwordx4
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Dinline-constraints.ll7 ; GCN: flat_load_dwordx4 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
17 …%v128 = tail call <4 x i32> asm sideeffect "flat_load_dwordx4 $0, $1", "=v,v"(i32 addrspace(1)* %p…
Dflat-address-space.ll82 ; CHECK: flat_load_dwordx4
Dload-global-i8.ll71 ; GCN-HSA: flat_load_dwordx4
/external/llvm/test/MC/AMDGPU/
Dreg-syntax-extra.s105 flat_load_dwordx4 v[8:11], v[2*2-2:(3*3-6)] label
108 flat_load_dwordx4 v[8/2+4:11/2+6], v[2:3] label
111 flat_load_dwordx4 [v[8/2+4],v9,v[10],v[11/2+6]], v[2:3] label
Dmacro-examples.s9 flat_load_dwordx4 v[8 + (\iter * 4):8 + (\iter * 4) + 3], v[2:3]
Dflat.s164 flat_load_dwordx4 v[5:8], v[3:4] label
/external/llvm/lib/Target/AMDGPU/
DCIInstructions.td132 flat<0xe, 0x17>, "flat_load_dwordx4", VReg_128
/external/llvm/test/MC/Disassembler/AMDGPU/
Dflat_vi.txt63 # VI: flat_load_dwordx4 v[5:8], v[3:4] ; encoding: [0x00,0x00,0x5c,0xdc,0x03,0x00,0x00,0x05]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DFLATInstructions.td385 def FLAT_LOAD_DWORDX4 : FLAT_Load_Pseudo <"flat_load_dwordx4", VReg_128>;
/external/mesa3d/src/amd/compiler/
Daco_instruction_selection.cpp3495 …de::buffer_load_dwordx4 : global ? aco_opcode::global_load_dwordx4 : aco_opcode::flat_load_dwordx4; in global_load_callback()