/external/vixl/src/aarch64/ |
D | simulator-aarch64.cc | 2904 fmlal(kFormatVnS, zda, zn_b, zm_b); in Simulate_ZdaS_ZnH_ZmH() 2907 fmlal(kFormatVnS, zda, zn_t, zm_t); in Simulate_ZdaS_ZnH_ZmH() 2934 fmlal(kFormatVnS, zda, zn_b, zm_idx); in Simulate_ZdaS_ZnH_ZmH_imm() 2937 fmlal(kFormatVnS, zda, zn_t, zm_idx); in Simulate_ZdaS_ZnH_ZmH_imm() 7180 fmlal(vf, rd, rn, rm); in VisitNEON3Same() 7748 fmlal(vform, rd, rn, rm, index); in SimulateNEONFPMulByElementLong()
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D | simulator-aarch64.h | 3116 LogicVRegister fmlal(VectorFormat vform, 4165 LogicVRegister fmlal(VectorFormat vform,
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D | assembler-aarch64.h | 3461 void fmlal(const VRegister& vd, const VRegister& vn, const VRegister& vm); 3467 void fmlal(const VRegister& vd,
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D | assembler-aarch64.cc | 3767 V(fmlal, NEON_FMLAL) \ in NEON_FP3SAME_OP_LIST() 4304 V(fmlal, NEON_FMLAL_H_byelement) \
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D | logic-aarch64.cc | 5273 LogicVRegister Simulator::fmlal(VectorFormat vform, in fmlal() function in vixl::aarch64::Simulator 5343 LogicVRegister Simulator::fmlal(VectorFormat vform, in fmlal() function in vixl::aarch64::Simulator
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D | macro-assembler-aarch64.h | 2713 V(fmlal, Fmlal) \ 2943 V(fmlal, Fmlal) \
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/external/vixl/test/aarch64/ |
D | test-simulator-aarch64.cc | 4674 DEFINE_TEST_NEON_FHM(fmlal, Basic, Basic, Basic) 4963 DEFINE_TEST_NEON_FHM_BYELEMENT(fmlal, Basic, Basic, Basic) in DEFINE_TEST_NEON_2SAME_FP_FP16_SCALAR()
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D | test-cpu-features-aarch64.cc | 3759 TEST_FP_FHM_NEON_NEONHALF(fmlal_0, fmlal(v0.V4S(), v1.V4H(), v2.H(), 0)) 3761 TEST_FP_FHM_NEON_NEONHALF(fmlal_1, fmlal(v0.V4S(), v1.V4H(), v2.V4H()))
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 4000 void fmlal(const VRegister& vd, 4010 void fmlal(const VRegister& vd, const VRegister& vn, const VRegister& vm)
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 749 defm FMLAL : SIMDThreeSameVectorFML<0, 1, 0b001, "fmlal", int_aarch64_neon_fmlal>; 753 defm FMLALlane : SIMDThreeSameVectorFMLIndex<0, 0b0000, "fmlal", int_aarch64_neon_fmlal>;
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenAsmMatcher.inc | 14310 …{ 1460 /* fmlal */, AArch64::FMLALv8f16, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__Vect… 14311 …{ 1460 /* fmlal */, AArch64::FMLALv4f16, Convert__VectorReg641_0__Tie0_1_1__VectorReg641_2__Vector… 14312 …{ 1460 /* fmlal */, AArch64::FMLALlanev8f16, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__… 14313 …{ 1460 /* fmlal */, AArch64::FMLALlanev4f16, Convert__VectorReg641_0__Tie0_1_1__VectorReg641_2__Ve… 21683 …{ 1460 /* fmlal */, AArch64::FMLALv4f16, Convert__imm_95_0__Tie0_1_1__imm_95_0__imm_95_0, AMFBS_Ha… 21684 …{ 1460 /* fmlal */, AArch64::FMLALv8f16, Convert__imm_95_0__Tie0_1_1__imm_95_0__imm_95_0, AMFBS_Ha… 21685 …{ 1460 /* fmlal */, AArch64::FMLALlanev8f16, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_1__… 21686 …{ 1460 /* fmlal */, AArch64::FMLALlanev4f16, Convert__VectorReg641_0__Tie0_1_1__VectorReg641_1__Ve…
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/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/ |
D | IntrinsicImpl.inc | 377 "llvm.aarch64.neon.fmlal", 10510 1, // llvm.aarch64.neon.fmlal
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