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/external/FP16/include/fp16/
Dbitcasts.h69 } fp64 = { w }; in fp64_from_bits()
70 return fp64.as_value; in fp64_from_bits()
87 } fp64 = { f }; in fp64_to_bits()
88 return fp64.as_bits; in fp64_to_bits()
/external/deqp/android/cts/main/vk-master-2019-03-01/
Dspirv-assembly.txt11678 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_var_flush_to_z…
11679 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_denorm_flush_t…
11680 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_inf_flush_to_z…
11681 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_var_flush_to_z…
11682 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_denorm_flush_t…
11683 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_inf_flush_to_z…
11684 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_var_flush_to_z…
11685 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_denorm_flush_t…
11686 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_var_flush_to_z…
11687 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_inf_flush_to_z…
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/external/llvm/test/CodeGen/AMDGPU/
Dhsa-fp-mode.ll65 attributes #2 = { nounwind "target-features"="-fp32-denormals,+fp64-denormals" }
66 attributes #3 = { nounwind "target-features"="+fp32-denormals,-fp64-denormals" }
67 attributes #4 = { nounwind "target-features"="+fp32-denormals,+fp64-denormals" }
68 attributes #5 = { nounwind "target-features"="-fp32-denormals,-fp64-denormals" }
Ddefault-fp-mode.ll59 attributes #2 = { nounwind "target-features"="+fp64-denormals" }
61 attributes #4 = { nounwind "target-features"="+fp32-denormals,+fp64-denormals" }
62 attributes #5 = { nounwind "target-features"="-fp32-denormals,-fp64-denormals" }
/external/llvm/test/CodeGen/Mips/
Dfp64a.ll14 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO-F…
15 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=AL…
16 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,32R2-NO…
17 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=…
19 ; RUN: llc -march=mips64 -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-FP6…
20 ; RUN: not llc -march=mips64 -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-pr…
21 ; RUN: llc -march=mips64el -mcpu=mips64 -mattr=fp64 < %s | FileCheck %s -check-prefixes=ALL,64-NO-F…
22 ; RUN: not llc -march=mips64el -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-…
D2013-11-18-fp64-const0.ll1 ; RUN: llc -march=mips -mattr=-fp64 < %s | FileCheck -check-prefix=CHECK-FP32 %s
2 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck -check-prefix=CHECK-FP64 %s
Dbuildpairextractelementf64.ll5 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck %s -check-prefixes=HAS-MFHC1,…
6 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 < %s | FileCheck %s -check-prefixes=HAS-MFHC1,ALL
Dcfi_offset.ll5 ; RUN: llc -march=mips -mattr=+o32,+fp64 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-EB
6 ; RUN: llc -march=mipsel -mattr=+o32,+fp64 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-EL
/external/deqp/android/cts/main/vksc-master/
Dspirv-assembly.txt3027 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_var_flush_to…
3028 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_denorm_flush…
3029 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_inf_flush_to…
3030 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_var_flush_to…
3031 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_denorm_flush…
3032 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_inf_flush_to…
3033 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_var_flush_to…
3034 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_denorm_flush…
3035 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_var_flush_to…
3036 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_inf_flush_to…
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/external/deqp/android/cts/main/vk-master/
Dspirv-assembly.txt15685 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_var_flush_to_z…
15686 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_denorm_flush_t…
15687 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_inf_flush_to_z…
15688 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_var_flush_to_z…
15689 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_denorm_flush_t…
15690 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_inf_flush_to_z…
15691 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_var_flush_to_z…
15692 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_denorm_flush_t…
15693 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_var_flush_to_z…
15694 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_inf_flush_to_z…
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/external/deqp/android/cts/main/vksc-main/
Dspirv-assembly.txt14290 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_var_flush_to…
14291 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_denorm_flush…
14292 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_inf_flush_to…
14293 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_var_flush_to…
14294 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_denorm_flush…
14295 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_inf_flush_to…
14296 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_var_flush_to…
14297 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_denorm_flush…
14298 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_var_flush_to…
14299 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_inf_flush_to…
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/external/deqp/external/vulkancts/mustpass/main/vksc-default/
Dspirv-assembly.txt14286 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_var_flush_to…
14287 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_denorm_flush…
14288 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_inf_flush_to…
14289 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_var_flush_to…
14290 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_denorm_flush…
14291 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_inf_flush_to…
14292 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_var_flush_to…
14293 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_denorm_flush…
14294 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_var_flush_to…
14295 dEQP-VKSC.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_inf_flush_to…
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/external/deqp/external/vulkancts/mustpass/main/vk-default/
Dspirv-assembly.txt15681 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_var_flush_to_z…
15682 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_denorm_flush_t…
15683 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_inf_flush_to_z…
15684 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_var_flush_to_z…
15685 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_denorm_flush_t…
15686 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_inf_flush_to_z…
15687 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_var_flush_to_z…
15688 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_denorm_flush_t…
15689 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_var_flush_to_z…
15690 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_inf_flush_to_z…
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/external/swiftshader/tests/regres/testlists/vk-default/
Dspirv-assembly.txt15681 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_var_flush_to_z…
15682 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_denorm_flush_t…
15683 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_add_inf_flush_to_z…
15684 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_var_flush_to_z…
15685 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_denorm_flush_t…
15686 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_sub_inf_flush_to_z…
15687 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_var_flush_to_z…
15688 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_mul_denorm_flush_t…
15689 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_var_flush_to_z…
15690 dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp64.input_args.denorm_div_inf_flush_to_z…
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/external/llvm/test/MC/Mips/
Dmips-reginfo-fp64.s1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa,+fp64 -filetype=obj -o - | \
5 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -target-abi n32 -filetype=obj -o - …
9 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -target-abi n64 -filetype=obj -o - …
Doddspreg.s1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64 | \
4 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64 -filetype=obj -o - | \
24 # RUN: llvm-mc /dev/null -arch=mips -mcpu=mips32 -mattr=+fp64 -filetype=obj -o - | \
/external/llvm/test/CodeGen/Mips/msa/
D2r_vector_scalar.ll4 ; RUN: llc -march=mips -mattr=+msa,+fp64 -relocation-model=pic < %s | \
6 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 -relocation-model=pic < %s | \
8 ; RUN: llc -march=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -relocation-model=pic < %s | \
10 ; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=+msa,+fp64 -relocation-model=pic < %s | \
Dllvm-stress-sz1-s742806235.ll2 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
Delm_move.ll4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
5 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
Dllvm-stress-s2501752154-simplified.ll2 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
Dllvm-stress-s449609655-simplified.ll2 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
Dspecial.ll3 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | \
5 ; RUN: llc -march=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 < %s | \
Dvecs10.ll3 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
/external/llvm/test/CodeGen/Mips/cconv/
Dcallee-saved-fpxx1.ll1 ; RUN: llc -march=mips -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=O32-FP64-INV %s
2 ; RUN: llc -march=mipsel -mattr=+o32,+fp64 < %s | FileCheck --check-prefix=O32-FP64-INV %s
/external/mesa3d/src/compiler/glsl/
Dbuiltin_functions.cpp732 fp64(const _mesa_glsl_parse_state *state) in fp64() function
1617 _##NAME(fp64, glsl_type::double_type), \ in create_builtins()
1618 _##NAME(fp64, glsl_type::dvec2_type), \ in create_builtins()
1619 _##NAME(fp64, glsl_type::dvec3_type), \ in create_builtins()
1620 _##NAME(fp64, glsl_type::dvec4_type), \ in create_builtins()
1629 _##NAME(fp64, glsl_type::double_type), \ in create_builtins()
1630 _##NAME(fp64, glsl_type::dvec2_type), \ in create_builtins()
1631 _##NAME(fp64, glsl_type::dvec3_type), \ in create_builtins()
1632 _##NAME(fp64, glsl_type::dvec4_type), \ in create_builtins()
1641 _##NAME(fp64, glsl_type::double_type), \ in create_builtins()
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