| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-recip.s | 45 frecpx h18, h10
46 frecpx s18, s10
47 frecpx d16, d19
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| D | fullfp16-neon-neg.s | 288 frecpx h18, h10
|
| D | neon-diagnostics.s | 234 frecpx s18, h10
235 frecpx d16, s19
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| /external/capstone/suite/MC/AArch64/ |
| D | neon-scalar-recip.s.cs | 8 0x52,0xf9,0xa1,0x5e = frecpx s18, s10
9 0x70,0xfa,0xe1,0x5e = frecpx d16, d19
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vsqrt.ll | 114 ;CHECK: frecpx s0, {{s[0-9]+}}
116 %tmp3 = call float @llvm.aarch64.neon.frecpx.f32(float %tmp1)
122 ;CHECK: frecpx d0, {{d[0-9]+}}
124 %tmp3 = call double @llvm.aarch64.neon.frecpx.f64(double %tmp1)
128 declare float @llvm.aarch64.neon.frecpx.f32(float) nounwind readnone
129 declare double @llvm.aarch64.neon.frecpx.f64(double) nounwind readnone
|
| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 6427 LogicVRegister Simulator::frecpx(VectorFormat vform, in frecpx() function in vixl::aarch64::Simulator
6463 LogicVRegister Simulator::frecpx(VectorFormat vform, in frecpx() function in vixl::aarch64::Simulator
6467 frecpx<SimFloat16>(vform, dst, src); in frecpx()
6469 frecpx<float>(vform, dst, src); in frecpx()
6472 frecpx<double>(vform, dst, src); in frecpx()
|
| D | simulator-aarch64.h | 4211 LogicVRegister frecpx(VectorFormat vform,
4214 LogicVRegister frecpx(VectorFormat vform,
|
| D | macro-assembler-aarch64.h | 2862 V(frecpx, Frecpx) \
4592 frecpx(zd, pg, zn); in Frecpx()
4597 frecpx(zd, pg.Merging(), zn); in Frecpx()
|
| D | assembler-aarch64.h | 2259 void frecpx(const VRegister& vd, const VRegister& vn);
4420 void frecpx(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn);
|
| D | simulator-aarch64.cc | 8535 frecpx(fpf, rd, rn); in VisitNEONScalar2RegMisc()
8628 frecpx(fpf, rd, rn); in VisitNEONScalar2RegMiscFP16()
10528 frecpx(vform, result, zn); in VisitSVEFPUnaryOp()
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 1539 # CHECK: frecpx s18, s10
1540 # CHECK: frecpx d16, d19
|
| /external/vixl/test/aarch64/ |
| D | test-api-movprfx-aarch64.cc | 535 __ frecpx(z7.VnH(), p6.Merging(), z7.VnH()); in TEST() local
1013 __ frecpx(z9.VnS(), p0.Merging(), z14.VnS()); in TEST() local
1875 __ frecpx(z12.VnH(), p1.Merging(), z4.VnH()); in TEST() local
|
| D | test-cpu-features-aarch64.cc | 3330 TEST_FP_NEON(frecpx_0, frecpx(s0, s1))
3331 TEST_FP_NEON(frecpx_1, frecpx(d0, d1))
3707 TEST_FP_NEON_NEONHALF(frecpx_0, frecpx(h0, h1))
|
| D | test-trace-aarch64.cc | 559 __ frecpx(d15, d18); in GenerateTestSequenceFP() local
560 __ frecpx(s5, s10); in GenerateTestSequenceFP() local
|
| D | test-simulator-aarch64.cc | 4879 DEFINE_TEST_NEON_2SAME_FP_FP16_SCALAR(frecpx, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
|
| D | test-disasm-sve-aarch64.cc | 1920 COMPARE(frecpx(z16.VnH(), p1.Merging(), z29.VnH()), in TEST()
1922 COMPARE(frecpx(z16.VnS(), p1.Merging(), z29.VnS()), in TEST()
1924 COMPARE(frecpx(z16.VnD(), p1.Merging(), z29.VnD()), in TEST()
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 12508 "s\006frecpx\010frint32x\010frint32z\010frint64x\010frint64z\006frinta\006"
14496 …{ 1609 /* frecpx */, AArch64::FRECPXv1f16, Convert__Reg1_0__Reg1_1, AMFBS_HasNEON_HasFullFP16, { M…
14497 …{ 1609 /* frecpx */, AArch64::FRECPXv1i32, Convert__Reg1_0__Reg1_1, AMFBS_HasNEON, { MCK_FPR32, MC…
14498 …{ 1609 /* frecpx */, AArch64::FRECPXv1i64, Convert__Reg1_0__Reg1_1, AMFBS_HasNEON, { MCK_FPR64, MC…
14499 …{ 1609 /* frecpx */, AArch64::FRECPX_ZPmZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPredicate3bAn…
14500 …{ 1609 /* frecpx */, AArch64::FRECPX_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAn…
14501 …{ 1609 /* frecpx */, AArch64::FRECPX_ZPmZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEPredicate3bAn…
21869 …{ 1609 /* frecpx */, AArch64::FRECPXv1f16, Convert__Reg1_0__Reg1_1, AMFBS_HasNEON_HasFullFP16, { M…
21870 …{ 1609 /* frecpx */, AArch64::FRECPXv1i32, Convert__Reg1_0__Reg1_1, AMFBS_HasNEON, { MCK_FPR32, MC…
21871 …{ 1609 /* frecpx */, AArch64::FRECPXv1i64, Convert__Reg1_0__Reg1_1, AMFBS_HasNEON, { MCK_FPR64, MC…
[all …]
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 480 0x~~~~~~~~~~~~~~~~ 5ee1fa4f frecpx d15, d18
481 0x~~~~~~~~~~~~~~~~ 5ea1f945 frecpx s5, s10
|
| D | log-disasm | 480 0x~~~~~~~~~~~~~~~~ 5ee1fa4f frecpx d15, d18
481 0x~~~~~~~~~~~~~~~~ 5ea1f945 frecpx s5, s10
|
| D | log-cpufeatures-custom | 479 0x~~~~~~~~~~~~~~~~ 5ee1fa4f frecpx d15, d18 ### {FP, NEON} ###
480 0x~~~~~~~~~~~~~~~~ 5ea1f945 frecpx s5, s10 ### {FP, NEON} ###
|
| D | log-cpufeatures | 479 0x~~~~~~~~~~~~~~~~ 5ee1fa4f frecpx d15, d18 // Needs: FP, NEON
480 0x~~~~~~~~~~~~~~~~ 5ea1f945 frecpx s5, s10 // Needs: FP, NEON
|
| D | log-cpufeatures-colour | 479 0x~~~~~~~~~~~~~~~~ 5ee1fa4f frecpx d15, d18 [1;35mFP, NEON[0;m
480 0x~~~~~~~~~~~~~~~~ 5ea1f945 frecpx s5, s10 [1;35mFP, NEON[0;m
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SVEInstrInfo.td | 1004 defm FRECPX_ZPmZ : sve_fp_2op_p_zd_HSD<0b01100, "frecpx", int_aarch64_sve_frecpx>;
|
| /external/capstone/arch/AArch64/ |
| D | AArch64MappingInsnOp.inc | 2485 { /* AArch64_FRECPXv1i32, ARM64_INS_FRECPX: frecpx $rd, $rn */
2489 { /* AArch64_FRECPXv1i64, ARM64_INS_FRECPX: frecpx $rd, $rn */
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 4233 void frecpx(const VRegister& vd, const VRegister& vn)
8097 void frecpx(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn)
|