Searched refs:fsqrt (Results 1 – 25 of 152) sorted by relevance
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | fsqrt.ll | 1 ; fsqrt should be generated when the fsqrt feature is enabled, but not
4 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=+fsqrt | \
5 ; RUN: grep "fsqrt f1, f1"
7 ; RUN: grep "fsqrt f1, f1"
8 ; RUN: llc < %s -mattr=-vsx -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-fsqrt | \
9 ; RUN: not grep "fsqrt f1, f1"
11 ; RUN: not grep "fsqrt f1, f1"
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| D | vec_sqrt.ll | 1 ; RUN: llc -mcpu=pwr6 -mattr=+altivec,+fsqrt < %s | FileCheck %s
4 ; does not provide an fsqrt instruction for vector.
59 ; CHECK: fsqrt {{[0-9]+}}, {{[0-9]+}}
60 ; CHECK: fsqrt {{[0-9]+}}, {{[0-9]+}}
68 ; CHECK: fsqrt {{[0-9]+}}, {{[0-9]+}}
69 ; CHECK: fsqrt {{[0-9]+}}, {{[0-9]+}}
70 ; CHECK: fsqrt {{[0-9]+}}, {{[0-9]+}}
71 ; CHECK: fsqrt {{[0-9]+}}, {{[0-9]+}}
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| D | qpx-recipest.ll | 30 ; CHECK-SAFE: fsqrt
82 ; CHECK-SAFE: fsqrt
168 ; CHECK-SAFE: fsqrt
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| /external/llvm/test/CodeGen/AArch64/ |
| D | sqrt-fastmath.ll | 12 define float @fsqrt(float %a) #0 {
16 ; FAULT-LABEL: fsqrt:
18 ; FAULT-NEXT: fsqrt
20 ; CHECK-LABEL: fsqrt:
32 ; FAULT-NEXT: fsqrt
47 ; FAULT-NEXT: fsqrt
62 ; FAULT-NEXT: fsqrt
76 ; FAULT-NEXT: fsqrt
92 ; FAULT-NEXT: fsqrt
107 ; FAULT-NEXT: fsqrt
[all …]
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| D | fast-isel-sqrt.ll | 6 ; CHECK: fsqrt s0, s0
14 ; CHECK: fsqrt d0, d0
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| /external/llvm/test/MC/Mips/msa/ |
| D | test_2rf.s | 25 # CHECK: fsqrt.w $w0, $w11 # encoding: [0x7b,0x26,0x58,0x1e]
26 # CHECK: fsqrt.d $w15, $w12 # encoding: [0x7b,0x27,0x63,0xde]
58 fsqrt.w $w0, $w11
59 fsqrt.d $w15, $w12
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| /external/capstone/suite/MC/PowerPC/ |
| D | ppc64-encoding-fp.s.cs | 47 0xfc,0x40,0x18,0x2c = fsqrt 2, 3
48 0xfc,0x40,0x18,0x2d = fsqrt. 2, 3
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| /external/capstone/suite/MC/Mips/ |
| D | test_2rf.s.cs | 24 0x7b,0x26,0x58,0x1e = fsqrt.w $w0, $w11
25 0x7b,0x27,0x63,0xde = fsqrt.d $w15, $w12
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| /external/llvm/test/CodeGen/Mips/msa/ |
| D | 2rf.ll | 252 %1 = tail call <4 x float> @llvm.mips.fsqrt.w(<4 x float> %0)
257 declare <4 x float> @llvm.mips.fsqrt.w(<4 x float>) nounwind
262 ; CHECK-DAG: fsqrt.w [[WD:\$w[0-9]+]], [[WS]]
273 %1 = tail call <2 x double> @llvm.mips.fsqrt.d(<2 x double> %0)
278 declare <2 x double> @llvm.mips.fsqrt.d(<2 x double>) nounwind
283 ; CHECK-DAG: fsqrt.d [[WD:\$w[0-9]+]], [[WS]]
301 ; CHECK-DAG: fsqrt.w [[WD:\$w[0-9]+]], [[WS]]
319 ; CHECK-DAG: fsqrt.d [[WD:\$w[0-9]+]], [[WS]]
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| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-fp.s | 154 # CHECK-BE: fsqrt 2, 3 # encoding: [0xfc,0x40,0x18,0x2c]
155 # CHECK-LE: fsqrt 2, 3 # encoding: [0x2c,0x18,0x40,0xfc]
156 fsqrt 2, 3
157 # CHECK-BE: fsqrt. 2, 3 # encoding: [0xfc,0x40,0x18,0x2d]
158 # CHECK-LE: fsqrt. 2, 3 # encoding: [0x2d,0x18,0x40,0xfc]
159 fsqrt. 2, 3
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| /external/llvm/test/MC/Disassembler/Mips/msa/ |
| D | test_2rf.txt | 25 0x7b 0x26 0x58 0x1e # CHECK: fsqrt.w $w0, $w11
26 0x7b 0x27 0x63 0xde # CHECK: fsqrt.d $w15, $w12
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| /external/musl/src/math/x32/ |
| D | sqrtl.s | 4 fsqrt
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| D | asinl.s | 10 fsqrt
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| D | acosl.s | 12 fsqrt
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| /external/musl/src/math/i386/ |
| D | asinl.s | 10 fsqrt
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| D | acosl.s | 10 fsqrt
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| D | acosf.s | 10 fsqrt
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| D | asin.s | 14 fsqrt
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| D | acos.s | 12 fsqrt
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| D | asinf.s | 14 fsqrt
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| /external/musl/src/math/x86_64/ |
| D | asinl.s | 10 fsqrt
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| D | acosl.s | 12 fsqrt
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| /external/llvm/test/MC/AArch64/ |
| D | neon-simd-misc.s | 730 fsqrt v4.4h, v0.4h
731 fsqrt v6.8h, v8.8h
732 fsqrt v6.4s, v8.4s
733 fsqrt v6.2d, v8.2d
734 fsqrt v4.2s, v0.2s
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| D | fullfp16-neon-neg.s | 28 fsqrt.4h v0, v0
52 fsqrt.8h v0, v0
378 fsqrt v4.4h, v0.4h
380 fsqrt v6.8h, v8.8h
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| /external/llvm/test/CodeGen/X86/ |
| D | pr26625.ll | 13 ; CHECK-NEXT: fsqrt
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