| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.h | 66 getMatchingSuperRegClass(const TargetRegisterClass *A,
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| D | X86RegisterInfo.cpp | 105 X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, in getMatchingSuperRegClass() function in X86RegisterInfo
114 return X86GenRegisterInfo::getMatchingSuperRegClass(A, B, SubIdx); in getMatchingSuperRegClass()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.h | 65 getMatchingSuperRegClass(const TargetRegisterClass *A,
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| D | X86RegisterInfo.cpp | 99 X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, in getMatchingSuperRegClass() function in X86RegisterInfo
108 return X86GenRegisterInfo::getMatchingSuperRegClass(A, B, SubIdx); in getMatchingSuperRegClass()
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| /external/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 210 TargetRegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, in getMatchingSuperRegClass() function in TargetRegisterInfo
314 return TRI.getMatchingSuperRegClass(SrcRC, DefRC, SrcSubReg) != nullptr; in shareSameRegisterFile()
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| D | DetectDeadLanes.cpp | 190 return !TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSubIdx); in isCrossCopy()
192 return !TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSubIdx); in isCrossCopy()
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| D | RegisterCoalescer.cpp | 368 NewRC = TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSub); in setRegisters()
372 NewRC = TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSub); in setRegisters()
1023 NewRC = TRI->getMatchingSuperRegClass(NewRC, DefRC, NewIdx); in reMaterializeTrivialDef()
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| D | TailDuplicator.cpp | 366 ConstrRC = TRI->getMatchingSuperRegClass(MappedRC, OrigRC, in duplicateInstruction()
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| D | TwoAddressInstructionPass.cpp | 1501 assert(TRI->getMatchingSuperRegClass(RC, MRI->getRegClass(RegA), in processTiedPairs()
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| D | MachineVerifier.cpp | 1037 DRC = TRI->getMatchingSuperRegClass(SuperRC, DRC, SubIdx); in visitMachineOperand()
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| D | MachineInstr.cpp | 1253 CurRC = TRI->getMatchingSuperRegClass(CurRC, OpRC, SubIdx); in getRegClassConstraintEffect()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 263 TargetRegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, in getMatchingSuperRegClass() function in TargetRegisterInfo
367 return TRI.getMatchingSuperRegClass(SrcRC, DefRC, SrcSubReg) != nullptr; in shareSameRegisterFile()
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| D | DetectDeadLanes.cpp | 187 return !TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSubIdx); in isCrossCopy()
189 return !TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSubIdx); in isCrossCopy()
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| D | TailDuplicator.cpp | 414 ConstrRC = TRI->getMatchingSuperRegClass(MappedRC, OrigRC, in duplicateInstruction()
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| D | RegisterCoalescer.cpp | 481 NewRC = TRI.getMatchingSuperRegClass(DstRC, SrcRC, DstSub); in setRegisters()
485 NewRC = TRI.getMatchingSuperRegClass(SrcRC, DstRC, SrcSub); in setRegisters()
1378 NewRC = TRI->getMatchingSuperRegClass(NewRC, DefRC, NewIdx); in reMaterializeTrivialDef()
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| D | TwoAddressInstructionPass.cpp | 1560 assert(TRI->getMatchingSuperRegClass(RC, MRI->getRegClass(RegA), in processTiedPairs()
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| D | MachineInstr.cpp | 909 CurRC = TRI->getMatchingSuperRegClass(CurRC, OpRC, SubIdx); in getRegClassConstraintEffect()
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| D | MachineVerifier.cpp | 1796 DRC = TRI->getMatchingSuperRegClass(SuperRC, DRC, SubIdx); in visitMachineOperand()
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 510 getMatchingSuperRegClass(const TargetRegisterClass *A,
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 527 getMatchingSuperRegClass(const TargetRegisterClass *A,
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.h | 1061 return RC == TRI->getMatchingSuperRegClass(RC, &TRC, P.SubReg); in isOfRegClass()
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| D | SIInstrInfo.cpp | 3940 DRC = RI.getMatchingSuperRegClass(SuperRC, DRC, MO.getSubReg()); in isLegalRegOperand()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 630 TRI->getMatchingSuperRegClass(RC, TRC, SubIdx); in EmitRegSequence()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 656 TRI->getMatchingSuperRegClass(RC, TRC, SubIdx); in EmitRegSequence()
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