Searched refs:getMaxNumSGPRs (Results 1 – 8 of 8) sorted by relevance
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUSubtarget.cpp | 639 unsigned GCNSubtarget::getMaxNumSGPRs(const MachineFunction &MF) const { in getMaxNumSGPRs() function in GCNSubtarget 646 unsigned MaxNumSGPRs = getMaxNumSGPRs(WavesPerEU.first, false); in getMaxNumSGPRs() 647 unsigned MaxAddressableNumSGPRs = getMaxNumSGPRs(WavesPerEU.first, true); in getMaxNumSGPRs() 672 if (Requested && Requested > getMaxNumSGPRs(WavesPerEU.first, false)) in getMaxNumSGPRs()
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D | AMDGPUSubtarget.h | 1117 unsigned getMaxNumSGPRs(unsigned WavesPerEU, bool Addressable) const { in getMaxNumSGPRs() function 1118 return AMDGPU::IsaInfo::getMaxNumSGPRs(this, WavesPerEU, Addressable); in getMaxNumSGPRs() 1132 unsigned getMaxNumSGPRs(const MachineFunction &MF) const;
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D | SIRegisterInfo.cpp | 111 unsigned BaseIdx = alignDown(ST.getMaxNumSGPRs(MF), 4) - 4; in reservedPrivateSegmentBufferReg() 135 unsigned Reg = findPrivateSegmentWaveByteOffsetRegIndex(ST.getMaxNumSGPRs(MF)); in reservedPrivateSegmentWaveByteOffsetReg() 192 unsigned MaxNumSGPRs = ST.getMaxNumSGPRs(MF); in getReservedRegs() 1734 return std::min(ST.getMaxNumSGPRs(Occupancy, true), ST.getMaxNumSGPRs(MF)); in getRegPressureLimit()
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D | GCNRegBankReassign.cpp | 743 MaxNumSGPRs = ST->getMaxNumSGPRs(MF); in runOnMachineFunction() 745 MaxNumSGPRs = std::min(ST->getMaxNumSGPRs(Occupancy, true), MaxNumSGPRs); in runOnMachineFunction()
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D | SIFrameLowering.cpp | 30 ST.getMaxNumSGPRs(MF) / 4); in getAllSGPR128() 36 ST.getMaxNumSGPRs(MF)); in getAllSGPRs()
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D | GCNSchedStrategy.cpp | 49 SGPRCriticalLimit = ST.getMaxNumSGPRs(TargetOccupancy, true); in initialize()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/ |
D | AMDGPUBaseInfo.h | 141 unsigned getMaxNumSGPRs(const MCSubtargetInfo *STI, unsigned WavesPerEU,
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D | AMDGPUBaseInfo.cpp | 376 unsigned getMaxNumSGPRs(const MCSubtargetInfo *STI, unsigned WavesPerEU, in getMaxNumSGPRs() function
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