| /external/eigen/test/ |
| D | inplace_decomposition.cpp | 17 template<typename DecType,typename MatrixType> void inplace(bool square = false, bool SPD = false) in inplace() function
86 CALL_SUBTEST_1(( inplace<LLT<Ref<MatrixXd> >, MatrixXd>(true,true) )); in EIGEN_DECLARE_TEST()
87 CALL_SUBTEST_1(( inplace<LLT<Ref<Matrix4d> >, Matrix4d>(true,true) )); in EIGEN_DECLARE_TEST()
89 CALL_SUBTEST_2(( inplace<LDLT<Ref<MatrixXd> >, MatrixXd>(true,true) )); in EIGEN_DECLARE_TEST()
90 CALL_SUBTEST_2(( inplace<LDLT<Ref<Matrix4d> >, Matrix4d>(true,true) )); in EIGEN_DECLARE_TEST()
92 CALL_SUBTEST_3(( inplace<PartialPivLU<Ref<MatrixXd> >, MatrixXd>(true,false) )); in EIGEN_DECLARE_TEST()
93 CALL_SUBTEST_3(( inplace<PartialPivLU<Ref<Matrix4d> >, Matrix4d>(true,false) )); in EIGEN_DECLARE_TEST()
95 CALL_SUBTEST_4(( inplace<FullPivLU<Ref<MatrixXd> >, MatrixXd>(true,false) )); in EIGEN_DECLARE_TEST()
96 CALL_SUBTEST_4(( inplace<FullPivLU<Ref<Matrix4d> >, Matrix4d>(true,false) )); in EIGEN_DECLARE_TEST()
98 CALL_SUBTEST_5(( inplace<HouseholderQR<Ref<MatrixXd> >, MatrixXd>(false,false) )); in EIGEN_DECLARE_TEST()
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| /external/XNNPACK/test/ |
| D | f32-vrelu.cc | 55 TEST(F32_VRELU__NEON_X4, inplace) { in TEST() argument
60 .inplace(true) in TEST()
102 TEST(F32_VRELU__NEON_X8, inplace) { in TEST() argument
107 .inplace(true) in TEST()
149 TEST(F32_VRELU__SSE_X4, inplace) { in TEST() argument
154 .inplace(true) in TEST()
196 TEST(F32_VRELU__SSE_X8, inplace) { in TEST() argument
201 .inplace(true) in TEST()
243 TEST(F32_VRELU__AVX_X8, inplace) { in TEST() argument
248 .inplace(true) in TEST()
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| D | f32-vsqrt.cc | 55 TEST(F32_VSQRT__NEON_SQRT_X4, inplace) { in TEST() argument
60 .inplace(true) in TEST()
102 TEST(F32_VSQRT__NEON_SQRT_X8, inplace) { in TEST() argument
107 .inplace(true) in TEST()
149 TEST(F32_VSQRT__NEONFMA_NR1RSQRTS1FMA1ADJ_X4, inplace) { in TEST() argument
154 .inplace(true) in TEST()
196 TEST(F32_VSQRT__NEONFMA_NR1RSQRTS1FMA1ADJ_X8, inplace) { in TEST() argument
201 .inplace(true) in TEST()
243 TEST(F32_VSQRT__NEONFMA_NR1RSQRTS1FMA1ADJ_X12, inplace) { in TEST() argument
248 .inplace(true) in TEST()
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| D | f32-vsigmoid.cc | 55 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X4, inplace) { in TEST() argument
60 .inplace(true) in TEST()
102 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X8, inplace) { in TEST() argument
107 .inplace(true) in TEST()
149 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X12, inplace) { in TEST() argument
154 .inplace(true) in TEST()
196 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X16, inplace) { in TEST() argument
201 .inplace(true) in TEST()
243 TEST(F32_VSIGMOID__NEON_RR2_LUT64_P2_NR2RECPS_X20, inplace) { in TEST() argument
248 .inplace(true) in TEST()
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| D | x8-lut.cc | 34 TEST(X8_LUT__SCALAR_X1, inplace) { in TEST() argument
38 .inplace(true) in TEST()
73 TEST(X8_LUT__SCALAR_X2, inplace) { in TEST() argument
77 .inplace(true) in TEST()
112 TEST(X8_LUT__SCALAR_X4, inplace) { in TEST() argument
116 .inplace(true) in TEST()
151 TEST(X8_LUT__SCALAR_X8, inplace) { in TEST() argument
155 .inplace(true) in TEST()
190 TEST(X8_LUT__SCALAR_X16, inplace) { in TEST() argument
194 .inplace(true) in TEST()
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| D | f16-vsigmoid.cc | 55 TEST(F16_VSIGMOID__NEONFP16ARITH_RR2_P2_DIV_X8, inplace) { in TEST() argument
60 .inplace(true) in TEST()
102 TEST(F16_VSIGMOID__NEONFP16ARITH_RR2_P2_DIV_X16, inplace) { in TEST() argument
107 .inplace(true) in TEST()
149 TEST(F16_VSIGMOID__NEONFP16ARITH_RR2_P2_DIV_X24, inplace) { in TEST() argument
154 .inplace(true) in TEST()
196 TEST(F16_VSIGMOID__NEONFP16ARITH_RR2_P2_DIV_X32, inplace) { in TEST() argument
201 .inplace(true) in TEST()
243 TEST(F16_VSIGMOID__NEONFP16ARITH_RR2_P2_DIV_X40, inplace) { in TEST() argument
248 .inplace(true) in TEST()
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| D | f32-vhswish.cc | 55 TEST(F32_VHSWISH__NEON_X4, inplace) { in TEST() argument
60 .inplace(true) in TEST()
102 TEST(F32_VHSWISH__NEON_X8, inplace) { in TEST() argument
107 .inplace(true) in TEST()
149 TEST(F32_VHSWISH__NEON_X16, inplace) { in TEST() argument
154 .inplace(true) in TEST()
196 TEST(F32_VHSWISH__SSE_X4, inplace) { in TEST() argument
201 .inplace(true) in TEST()
243 TEST(F32_VHSWISH__SSE_X8, inplace) { in TEST() argument
248 .inplace(true) in TEST()
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| D | f32-vsqr.cc | 55 TEST(F32_VSQR__NEON_X4, inplace) { in TEST() argument
60 .inplace(true) in TEST()
102 TEST(F32_VSQR__NEON_X8, inplace) { in TEST() argument
107 .inplace(true) in TEST()
149 TEST(F32_VSQR__SSE_X4, inplace) { in TEST() argument
154 .inplace(true) in TEST()
196 TEST(F32_VSQR__SSE_X8, inplace) { in TEST() argument
201 .inplace(true) in TEST()
243 TEST(F32_VSQR__AVX_X8, inplace) { in TEST() argument
248 .inplace(true) in TEST()
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| D | f32-vneg.cc | 55 TEST(F32_VNEG__NEON_X4, inplace) { in TEST() argument
60 .inplace(true) in TEST()
102 TEST(F32_VNEG__NEON_X8, inplace) { in TEST() argument
107 .inplace(true) in TEST()
149 TEST(F32_VNEG__SSE_X4, inplace) { in TEST() argument
154 .inplace(true) in TEST()
196 TEST(F32_VNEG__SSE_X8, inplace) { in TEST() argument
201 .inplace(true) in TEST()
243 TEST(F32_VNEG__AVX_X8, inplace) { in TEST() argument
248 .inplace(true) in TEST()
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| D | f32-vabs.cc | 55 TEST(F32_VABS__NEON_X4, inplace) { in TEST() argument
60 .inplace(true) in TEST()
102 TEST(F32_VABS__NEON_X8, inplace) { in TEST() argument
107 .inplace(true) in TEST()
149 TEST(F32_VABS__SSE_X4, inplace) { in TEST() argument
154 .inplace(true) in TEST()
196 TEST(F32_VABS__SSE_X8, inplace) { in TEST() argument
201 .inplace(true) in TEST()
243 TEST(F32_VABS__AVX_X8, inplace) { in TEST() argument
248 .inplace(true) in TEST()
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| D | f32-vminc.cc | 56 TEST(F32_VMINC__NEON_X4, inplace) { in TEST() argument
61 .inplace(true) in TEST()
103 TEST(F32_VMINC__NEON_X8, inplace) { in TEST() argument
108 .inplace(true) in TEST()
150 TEST(F32_VMINC__SSE_X4, inplace) { in TEST() argument
155 .inplace(true) in TEST()
197 TEST(F32_VMINC__SSE_X8, inplace) { in TEST() argument
202 .inplace(true) in TEST()
244 TEST(F32_VMINC__AVX_X8, inplace) { in TEST() argument
249 .inplace(true) in TEST()
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| D | f32-vmaxc.cc | 56 TEST(F32_VMAXC__NEON_X4, inplace) { in TEST() argument
61 .inplace(true) in TEST()
103 TEST(F32_VMAXC__NEON_X8, inplace) { in TEST() argument
108 .inplace(true) in TEST()
150 TEST(F32_VMAXC__SSE_X4, inplace) { in TEST() argument
155 .inplace(true) in TEST()
197 TEST(F32_VMAXC__SSE_X8, inplace) { in TEST() argument
202 .inplace(true) in TEST()
244 TEST(F32_VMAXC__AVX_X8, inplace) { in TEST() argument
249 .inplace(true) in TEST()
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| D | vunary-microkernel-tester.h | 49 inline VUnaryMicrokernelTester& inplace(bool inplace) { in inplace() argument
50 this->inplace_ = inplace; in inplace()
54 inline bool inplace() const { in inplace() function
136 std::vector<float> y(batch_size() + (inplace() ? XNN_EXTRA_BYTES / sizeof(float) : 0)); in Test()
139 if (inplace()) { in Test()
145 const float* x_data = inplace() ? y.data() : x.data(); in Test()
169 std::vector<uint16_t> y(batch_size() + (inplace() ? XNN_EXTRA_BYTES / sizeof(uint16_t) : 0));
172 if (inplace()) {
178 const uint16_t* x_data = inplace() ? y.data() : x.data();
208 std::vector<float> y(batch_size() + (inplace() ? XNN_EXTRA_BYTES / sizeof(float) : 0));
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| D | f32-vrndne.cc | 55 TEST(F32_VRNDNE__NEON_X4, inplace) { in TEST() argument
60 .inplace(true) in TEST()
102 TEST(F32_VRNDNE__NEON_X8, inplace) { in TEST() argument
107 .inplace(true) in TEST()
149 TEST(F32_VRNDNE__NEONV8_X4, inplace) { in TEST() argument
154 .inplace(true) in TEST()
196 TEST(F32_VRNDNE__NEONV8_X8, inplace) { in TEST() argument
201 .inplace(true) in TEST()
243 TEST(F32_VRNDNE__SSE2_X4, inplace) { in TEST() argument
248 .inplace(true) in TEST()
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| D | f32-vrndd.cc | 55 TEST(F32_VRNDD__NEON_X4, inplace) { in TEST() argument
60 .inplace(true) in TEST()
102 TEST(F32_VRNDD__NEON_X8, inplace) { in TEST() argument
107 .inplace(true) in TEST()
149 TEST(F32_VRNDD__NEONV8_X4, inplace) { in TEST() argument
154 .inplace(true) in TEST()
196 TEST(F32_VRNDD__NEONV8_X8, inplace) { in TEST() argument
201 .inplace(true) in TEST()
243 TEST(F32_VRNDD__SSE2_X4, inplace) { in TEST() argument
248 .inplace(true) in TEST()
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| D | f32-vrndu.cc | 55 TEST(F32_VRNDU__NEON_X4, inplace) { in TEST() argument
60 .inplace(true) in TEST()
102 TEST(F32_VRNDU__NEON_X8, inplace) { in TEST() argument
107 .inplace(true) in TEST()
149 TEST(F32_VRNDU__NEONV8_X4, inplace) { in TEST() argument
154 .inplace(true) in TEST()
196 TEST(F32_VRNDU__NEONV8_X8, inplace) { in TEST() argument
201 .inplace(true) in TEST()
243 TEST(F32_VRNDU__SSE2_X4, inplace) { in TEST() argument
248 .inplace(true) in TEST()
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| D | f32-vrndz.cc | 55 TEST(F32_VRNDZ__NEON_X4, inplace) { in TEST() argument
60 .inplace(true) in TEST()
102 TEST(F32_VRNDZ__NEON_X8, inplace) { in TEST() argument
107 .inplace(true) in TEST()
149 TEST(F32_VRNDZ__NEONV8_X4, inplace) { in TEST() argument
154 .inplace(true) in TEST()
196 TEST(F32_VRNDZ__NEONV8_X8, inplace) { in TEST() argument
201 .inplace(true) in TEST()
243 TEST(F32_VRNDZ__SSE2_X4, inplace) { in TEST() argument
248 .inplace(true) in TEST()
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| D | f32-vsqrdiffc.cc | 56 TEST(F32_VSQRDIFFC__NEON_X4, inplace) { in TEST() argument
61 .inplace(true) in TEST()
103 TEST(F32_VSQRDIFFC__NEON_X8, inplace) { in TEST() argument
108 .inplace(true) in TEST()
150 TEST(F32_VSQRDIFFC__SSE_X4, inplace) { in TEST() argument
155 .inplace(true) in TEST()
197 TEST(F32_VSQRDIFFC__SSE_X8, inplace) { in TEST() argument
202 .inplace(true) in TEST()
244 TEST(F32_VSQRDIFFC__AVX_X8, inplace) { in TEST() argument
249 .inplace(true) in TEST()
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| D | f32-vlrelu.cc | 55 TEST(F32_VLRELU__NEON_X4, inplace) { in TEST() argument
60 .inplace(true) in TEST()
114 TEST(F32_VLRELU__NEON_X8, inplace) { in TEST() argument
119 .inplace(true) in TEST()
173 TEST(F32_VLRELU__SSE_X4, inplace) { in TEST() argument
178 .inplace(true) in TEST()
232 TEST(F32_VLRELU__SSE_X8, inplace) { in TEST() argument
237 .inplace(true) in TEST()
291 TEST(F32_VLRELU__SSE2_X4, inplace) { in TEST() argument
296 .inplace(true) in TEST()
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| D | f32-vmulc-relu.cc | 52 TEST(F32_VMULC_RELU__WASMSIMD_X4, inplace) { in TEST() argument
56 .inplace(true) in TEST()
94 TEST(F32_VMULC_RELU__WASMSIMD_X8, inplace) { in TEST() argument
98 .inplace(true) in TEST()
136 TEST(F32_VMULC_RELU__WASMSIMD_X16, inplace) { in TEST() argument
140 .inplace(true) in TEST()
162 TEST(F32_VMULC_RELU__WASM_X1, inplace) { in TEST() argument
166 .inplace(true) in TEST()
204 TEST(F32_VMULC_RELU__WASM_X2, inplace) { in TEST() argument
208 .inplace(true) in TEST()
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| D | f32-vdivc-relu.cc | 52 TEST(F32_VDIVC_RELU__WASMSIMD_X4, inplace) { in TEST() argument
56 .inplace(true) in TEST()
94 TEST(F32_VDIVC_RELU__WASMSIMD_X8, inplace) { in TEST() argument
98 .inplace(true) in TEST()
136 TEST(F32_VDIVC_RELU__WASMSIMD_X16, inplace) { in TEST() argument
140 .inplace(true) in TEST()
162 TEST(F32_VDIVC_RELU__WASM_X1, inplace) { in TEST() argument
166 .inplace(true) in TEST()
204 TEST(F32_VDIVC_RELU__WASM_X2, inplace) { in TEST() argument
208 .inplace(true) in TEST()
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| D | f32-vaddc-relu.cc | 52 TEST(F32_VADDC_RELU__WASMSIMD_X4, inplace) { in TEST() argument
56 .inplace(true) in TEST()
94 TEST(F32_VADDC_RELU__WASMSIMD_X8, inplace) { in TEST() argument
98 .inplace(true) in TEST()
136 TEST(F32_VADDC_RELU__WASMSIMD_X16, inplace) { in TEST() argument
140 .inplace(true) in TEST()
162 TEST(F32_VADDC_RELU__WASM_X1, inplace) { in TEST() argument
166 .inplace(true) in TEST()
204 TEST(F32_VADDC_RELU__WASM_X2, inplace) { in TEST() argument
208 .inplace(true) in TEST()
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| D | f32-vrdivc-relu.cc | 52 TEST(F32_VRDIVC_RELU__WASMSIMD_X4, inplace) { in TEST() argument
56 .inplace(true) in TEST()
94 TEST(F32_VRDIVC_RELU__WASMSIMD_X8, inplace) { in TEST() argument
98 .inplace(true) in TEST()
136 TEST(F32_VRDIVC_RELU__WASMSIMD_X16, inplace) { in TEST() argument
140 .inplace(true) in TEST()
162 TEST(F32_VRDIVC_RELU__WASM_X1, inplace) { in TEST() argument
166 .inplace(true) in TEST()
204 TEST(F32_VRDIVC_RELU__WASM_X2, inplace) { in TEST() argument
208 .inplace(true) in TEST()
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| D | f32-vrsubc-relu.cc | 52 TEST(F32_VRSUBC_RELU__WASMSIMD_X4, inplace) { in TEST() argument
56 .inplace(true) in TEST()
94 TEST(F32_VRSUBC_RELU__WASMSIMD_X8, inplace) { in TEST() argument
98 .inplace(true) in TEST()
136 TEST(F32_VRSUBC_RELU__WASMSIMD_X16, inplace) { in TEST() argument
140 .inplace(true) in TEST()
162 TEST(F32_VRSUBC_RELU__WASM_X1, inplace) { in TEST() argument
166 .inplace(true) in TEST()
204 TEST(F32_VRSUBC_RELU__WASM_X2, inplace) { in TEST() argument
208 .inplace(true) in TEST()
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| D | f32-vsubc-relu.cc | 52 TEST(F32_VSUBC_RELU__WASMSIMD_X4, inplace) { in TEST() argument
56 .inplace(true) in TEST()
94 TEST(F32_VSUBC_RELU__WASMSIMD_X8, inplace) { in TEST() argument
98 .inplace(true) in TEST()
136 TEST(F32_VSUBC_RELU__WASMSIMD_X16, inplace) { in TEST() argument
140 .inplace(true) in TEST()
162 TEST(F32_VSUBC_RELU__WASM_X1, inplace) { in TEST() argument
166 .inplace(true) in TEST()
204 TEST(F32_VSUBC_RELU__WASM_X2, inplace) { in TEST() argument
208 .inplace(true) in TEST()
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