| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 560 bool isAdd = true; in EncodeAddrModeOpValues() local
565 isAdd = false; in EncodeAddrModeOpValues()
571 isAdd = false; in EncodeAddrModeOpValues()
575 return isAdd; in EncodeAddrModeOpValues()
879 bool isAdd = true; in getAddrModeImm12OpValue() local
888 isAdd = false ; // 'U' bit is set as part of the fixup. in getAddrModeImm12OpValue()
903 isAdd = false; in getAddrModeImm12OpValue()
906 isAdd = false; in getAddrModeImm12OpValue()
911 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm12, Fixups, STI); in getAddrModeImm12OpValue()
915 if (isAdd) in getAddrModeImm12OpValue()
[all …]
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| D | ARMAsmBackend.cpp | 410 bool isAdd = true; in adjustFixupValue() local
413 isAdd = false; in adjustFixupValue()
419 Value |= isAdd << 23; in adjustFixupValue()
610 bool isAdd = true; in adjustFixupValue() local
613 isAdd = false; in adjustFixupValue()
621 return Value | (isAdd << 23); in adjustFixupValue()
630 bool isAdd = true; in adjustFixupValue() local
633 isAdd = false; in adjustFixupValue()
641 Value |= isAdd << 23; in adjustFixupValue()
657 bool isAdd = true; in adjustFixupValue() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 606 bool isAdd = true; in EncodeAddrModeOpValues() local
611 isAdd = false; in EncodeAddrModeOpValues()
617 isAdd = false; in EncodeAddrModeOpValues()
621 return isAdd; in EncodeAddrModeOpValues()
987 bool isAdd = true; in getAddrModeImm12OpValue() local
996 isAdd = false ; // 'U' bit is set as part of the fixup. in getAddrModeImm12OpValue()
1011 isAdd = false; in getAddrModeImm12OpValue()
1014 isAdd = false; in getAddrModeImm12OpValue()
1019 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm12, Fixups, STI); in getAddrModeImm12OpValue()
1023 if (isAdd) in getAddrModeImm12OpValue()
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| D | ARMAsmBackend.cpp | 485 bool isAdd = true; in adjustFixupValue() local
488 isAdd = false; in adjustFixupValue()
494 Value |= isAdd << 23; in adjustFixupValue()
714 bool isAdd = true; in adjustFixupValue() local
717 isAdd = false; in adjustFixupValue()
725 return Value | (isAdd << 23); in adjustFixupValue()
734 bool isAdd = true; in adjustFixupValue() local
737 isAdd = false; in adjustFixupValue()
745 Value |= isAdd << 23; in adjustFixupValue()
761 bool isAdd = true; in adjustFixupValue() local
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| /external/apache-commons-math/src/main/java/org/apache/commons/math/fraction/ |
| D | Fraction.java | 476 private Fraction addSub(Fraction fraction, boolean isAdd) { in addSub() argument
482 return isAdd ? fraction : fraction.negate(); in addSub()
495 (isAdd ? MathUtils.addAndCheck(uvp, upv) : in addSub()
506 BigInteger t = isAdd ? uvp.add(upv) : uvp.subtract(upv); in addSub()
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| /external/google-smali/dexlib2/src/main/java/com/android/tools/smali/dexlib2/util/ |
| D | SyntheticAccessorFSM.java | 555 boolean isAdd = ((mathOp == ADD) && !negativeConstant) || in getIncrementType()
559 if (isAdd) { in getIncrementType()
565 if (isAdd) { in getIncrementType()
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| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/util/ |
| D | SyntheticAccessorFSM.java | 555 boolean isAdd = ((mathOp == ADD) && !negativeConstant) || in getIncrementType()
559 if (isAdd) { in getIncrementType()
565 if (isAdd) { in getIncrementType()
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| /external/apache-commons-lang/src/main/java/org/apache/commons/lang3/math/ |
| D | Fraction.java | 719 private Fraction addSub(final Fraction fraction, final boolean isAdd) { in addSub() argument
723 return isAdd ? fraction : fraction.negate(); in addSub()
735 …return new Fraction(isAdd ? addAndCheck(uvp, upv) : subAndCheck(uvp, upv), mulPosAndCheck(denomina… in addSub()
743 final BigInteger t = isAdd ? uvp.add(upv) : uvp.subtract(upv); in addSub()
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| /external/smali/dexlib2/src/main/ragel/ |
| D | SyntheticAccessorFSM.rl | 252 boolean isAdd = ((mathOp == ADD) && !negativeConstant) ||
256 if (isAdd) {
262 if (isAdd) {
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| /external/google-smali/dexlib2/src/main/ragel/ |
| D | SyntheticAccessorFSM.rl | 251 boolean isAdd = ((mathOp == ADD) && !negativeConstant) ||
255 if (isAdd) {
261 if (isAdd) {
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| /external/openthread/src/posix/platform/ |
| D | multicast_routing.cpp | 157 void MulticastRoutingManager::UpdateMldReport(const Ip6::Address &aAddress, bool isAdd) in UpdateMldReport() argument
164 …error = (setsockopt(mMulticastRouterSock, IPPROTO_IPV6, (isAdd ? IPV6_JOIN_GROUP : IPV6_LEAVE_GROU… in UpdateMldReport()
170 (isAdd ? "Added" : "Removed")); in UpdateMldReport()
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| D | multicast_routing.hpp | 111 void UpdateMldReport(const Ip6::Address &aAddress, bool isAdd);
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| D | netif.cpp | 991 static void logAddrEvent(bool isAdd, const ot::Ip6::Address &aAddress, otError error) in logAddrEvent() argument
995 …if ((error == OT_ERROR_NONE) || ((isAdd) && (error == OT_ERROR_ALREADY || error == OT_ERROR_REJECT… in logAddrEvent()
996 ((!isAdd) && (error == OT_ERROR_NOT_FOUND || error == OT_ERROR_REJECTED))) in logAddrEvent()
998 … otLogInfoPlat("[netif] %s [%s] %s%s", isAdd ? "ADD" : "DEL", aAddress.IsMulticast() ? "M" : "U", in logAddrEvent()
1007 …otLogWarnPlat("[netif] %s [%s] %s failed (%s)", isAdd ? "ADD" : "DEL", aAddress.IsMulticast() ? "M… in logAddrEvent()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 277 bool isAdd() const { return Flags & (1ULL << MCID::Add); } in isAdd() function
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonHardwareLoops.cpp | 421 bool isAdd = (UpdOpc == Hexagon::A2_addi || UpdOpc == Hexagon::A2_addp); in findInductionRegister() local
423 if (isAdd) { in findInductionRegister()
1602 bool isAdd = (UpdOpc == Hexagon::A2_addi || UpdOpc == Hexagon::A2_addp); in fixupInductionVariable() local
1604 if (isAdd) { in fixupInductionVariable()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 524 bool isAdd; member
2185 ARM_AM::getAM3Opc(PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub, 0); in addAM3OffsetOperands()
2392 bool isAdd = Imm >= 0; in addPostIdxImm8Operands() local
2394 Imm = (Imm < 0 ? -Imm : Imm) | (int)isAdd << 8; in addPostIdxImm8Operands()
2403 bool isAdd = Imm >= 0; in addPostIdxImm8s4Operands() local
2406 Imm = ((Imm < 0 ? -Imm : Imm) / 4) | (int)isAdd << 8; in addPostIdxImm8s4Operands()
2413 Inst.addOperand(MCOperand::createImm(PostIdxReg.isAdd)); in addPostIdxRegOperands()
2421 ARM_AM::AddrOpc opc = PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub; in addPostIdxRegShiftedOperands()
2822 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, in CreatePostIdxReg() argument
2826 Op->PostIdxReg.isAdd = isAdd; in CreatePostIdxReg()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 795 bool isAdd; member
2874 ARM_AM::getAM3Opc(PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub, 0); in addAM3OffsetOperands()
3095 bool isAdd = Imm >= 0; in addPostIdxImm8Operands() local
3097 Imm = (Imm < 0 ? -Imm : Imm) | (int)isAdd << 8; in addPostIdxImm8Operands()
3106 bool isAdd = Imm >= 0; in addPostIdxImm8s4Operands() local
3109 Imm = ((Imm < 0 ? -Imm : Imm) / 4) | (int)isAdd << 8; in addPostIdxImm8s4Operands()
3116 Inst.addOperand(MCOperand::createImm(PostIdxReg.isAdd)); in addPostIdxRegOperands()
3124 ARM_AM::AddrOpc opc = PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub; in addPostIdxRegShiftedOperands()
3644 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, in CreatePostIdxReg() argument
3648 Op->PostIdxReg.isAdd = isAdd; in CreatePostIdxReg()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 2736 // {12} isAdd
2754 // {12} isAdd
2846 // {12} isAdd
2865 // {12} isAdd
2882 // {12} isAdd
2901 // {12} isAdd
3007 // {12} isAdd
3025 // {12} isAdd
3169 // {12} isAdd
3188 // {12} isAdd
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| D | ARMInstrFormats.td | 791 // {12} isAdd
809 // {12} isAdd
830 // {12} isAdd
883 // {8} isAdd
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| D | ARMBaseInstrInfo.cpp | 600 bool isAdd = ARM_AM::getAM2Op(OffImm) == ARM_AM::add; in isLdstScaledRegNotPlusLsl2() local
604 bool SimpleScaled = (isAdd && ShiftOpc == ARM_AM::lsl && Amt == 2); in isLdstScaledRegNotPlusLsl2()
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| D | ARMInstrThumb.td | 945 let isAdd = 1 in {
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonHardwareLoops.cpp | 442 if (DI->getDesc().isAdd()) { in findInductionRegister()
1641 if (DI->getDesc().isAdd()) { in fixupInductionVariable()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 2579 // {12} isAdd
2597 // {12} isAdd
2689 // {12} isAdd
2708 // {12} isAdd
2725 // {12} isAdd
2744 // {12} isAdd
2850 // {12} isAdd
2868 // {12} isAdd
3012 // {12} isAdd
3031 // {12} isAdd
[all …]
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| D | ARMInstrFormats.td | 673 // {12} isAdd
691 // {12} isAdd
712 // {12} isAdd
765 // {8} isAdd
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX8664.cpp | 4444 static bool isAdd(const Inst *Instr) { in isAdd() function in Ice::X8664::AddressOptimizer
4539 if (isAdd(BaseInst) && in matchCombinedBaseIndex()
|