| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonPseudo.td | 161 let isCall = 1, hasSideEffects = 1, isPredicable = 0,
178 isPredicable = 0 in
207 let isPredicable = 0; // !if(isPred, 0, 1);
220 isPredicable = 1, hasSideEffects = 0, InputType = "reg",
234 isCodeGenOnly = 1, Defs = [PC], Uses = [R28], isPredicable = 0 in
238 let isPseudo = 1, isCall = 1, isReturn = 1, isBarrier = 1, isPredicable = 0,
244 let isPseudo = 1, isCall = 1, isReturn = 1, isBarrier = 1, isPredicable = 0,
337 isPredicable = 1,
353 Defs = [R29, R30, R31, PC], isPredicable = 0, isAsmParserOnly = 1 in {
|
| D | HexagonExpandCondsets.cpp | 219 bool isPredicable(MachineInstr *MI);
722 bool HexagonExpandCondsets::isPredicable(MachineInstr *MI) { in isPredicable() function in HexagonExpandCondsets
723 if (HII->isPredicated(*MI) || !HII->isPredicable(*MI)) in isPredicable()
960 if (!DefI || !isPredicable(DefI)) in predicate()
1227 if (!RDef || !HII->isPredicable(*RDef)) { in coalesceSegments()
1238 if (!RDef || !HII->isPredicable(*RDef)) { in coalesceSegments()
|
| D | HexagonEarlyIfConv.cpp | 482 if (!HII->isPredicable(*Def1) || !HII->isPredicable(*Def3)) in computePhiCost()
681 return MI->mayStore() && HII->isPredicable(const_cast<MachineInstr&>(*MI)); in isPredicableStore()
|
| D | HexagonDepInstrInfo.td | 57 let isPredicable = 1;
220 let isPredicable = 1;
307 let isPredicable = 1;
345 let isPredicable = 1;
357 let isPredicable = 1;
432 let isPredicable = 1;
592 let isPredicable = 1;
1068 let isPredicable = 1;
1403 let isPredicable = 1;
1415 let isPredicable = 1;
[all …]
|
| D | HexagonInstrInfo.h | 246 bool isPredicable(const MachineInstr &MI) const override;
|
| /external/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 264 bool isPredicable() const { return Flags & (1 << MCID::Predicable); } in isPredicable() function
538 if (isPredicable()) { in findFirstPredOperandIdx()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 336 bool isPredicable() const { return Flags & (1ULL << MCID::Predicable); } in isPredicable() function
629 if (isPredicable()) { in findFirstPredOperandIdx()
|
| /external/llvm/lib/Target/ARM/ |
| D | Thumb2SizeReduction.cpp | 756 if (!NewMCID.isPredicable()) in ReduceTo2Addr()
760 SkipPred = !NewMCID.isPredicable(); in ReduceTo2Addr()
852 if (!NewMCID.isPredicable()) in ReduceToNarrow()
856 SkipPred = !NewMCID.isPredicable(); in ReduceToNarrow()
910 if (!MCID.isPredicable() && NewMCID.isPredicable()) in ReduceToNarrow()
|
| D | ARMBaseInstrInfo.h | 153 bool isPredicable(MachineInstr &MI) const override;
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenInstruction.h | 140 bool isPredicable; variable
238 bool isPredicable : 1; variable
|
| D | CodeGenInstruction.cpp | 29 isPredicable = false; in CGIOperandList()
100 isPredicable = true; in CGIOperandList()
313 isPredicable = Operands.isPredicable || R->getValueAsBit("isPredicable"); in CodeGenInstruction()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | Thumb2SizeReduction.cpp | 796 if (!NewMCID.isPredicable()) in ReduceTo2Addr()
800 SkipPred = !NewMCID.isPredicable(); in ReduceTo2Addr()
889 if (!NewMCID.isPredicable()) in ReduceToNarrow()
893 SkipPred = !NewMCID.isPredicable(); in ReduceToNarrow()
958 if (!MCID.isPredicable() && NewMCID.isPredicable()) in ReduceToNarrow()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 256 bool isPredicable(MachineInstr *MI);
718 bool HexagonExpandCondsets::isPredicable(MachineInstr *MI) { in isPredicable() function in HexagonExpandCondsets
719 if (HII->isPredicated(*MI) || !HII->isPredicable(*MI)) in isPredicable()
969 if (!DefI || !isPredicable(DefI)) in predicate()
1234 if (!RDef || !HII->isPredicable(*RDef)) in coalesceSegments()
1240 if (!RDef || !HII->isPredicable(*RDef)) in coalesceSegments()
|
| D | HexagonInstrInfo.h | 227 bool isPredicable(MachineInstr &MI) const override;
|
| D | HexagonEarlyIfConv.cpp | 446 if (!TII->isPredicable(*Def1) || !TII->isPredicable(*Def3)) in computePhiCost()
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.h | 176 bool isPredicable(MachineInstr &MI) const override;
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 245 bool isPredicable(MachineInstr &MI) const override;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.h | 232 bool isPredicable(const MachineInstr &MI) const override;
|
| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 1111 virtual bool isPredicable(MachineInstr &MI) const { in isPredicable() function
1112 return MI.getDesc().isPredicable(); in isPredicable()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.h | 182 bool isPredicable(const MachineInstr &MI) const override;
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600InstrInfo.h | 176 bool isPredicable(MachineInstr &MI) const override;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 170 if (!MI.isPredicable()) in isUnpredicatedTerminator()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 168 if (!MI.isPredicable()) in isUnpredicatedTerminator()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 1342 virtual bool isPredicable(const MachineInstr &MI) const { in isPredicable() function
1343 return MI.getDesc().isPredicable(); in isPredicable()
|
| /external/llvm/lib/CodeGen/ |
| D | ImplicitNullChecks.cpp | 429 if (MI.mayLoad() && !MI.isPredicable() && BaseReg == PointerReg && in analyzeBlockForNullChecks()
|