/external/tensorflow/tensorflow/core/kernels/ |
D | avgpooling_op_gpu.cu.cc | 46 const int pooled_height, const int pooled_width, const int kernel_h, in DEFINE_GPU_KERNELS() 56 const int phstart = (h < kernel_h) ? 0 : (h - kernel_h) / stride_h + 1; in DEFINE_GPU_KERNELS() 68 int hend = min(hstart + kernel_h, height); in DEFINE_GPU_KERNELS() 85 const int pooled_width, const int kernel_h, in RunAvePoolBackwardNHWC() argument 95 channels, pooled_height, pooled_width, kernel_h, kernel_w, stride_h, in RunAvePoolBackwardNHWC() 104 const int pooled_width, const int kernel_h, const int kernel_w, 110 const int pooled_width, const int kernel_h, const int kernel_w, 116 const int pooled_width, const int kernel_h, const int kernel_w,
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D | maxpooling_op_gpu.cu.cc | 70 const int pooled_height, const int pooled_width, const int kernel_h, in MaxPoolForwardNCHW() argument 81 int hend = min(hstart + kernel_h, height); in MaxPoolForwardNCHW() 114 const int pooled_width, const int kernel_h, const int kernel_w, in MaxPoolForwardNoMaskKernel_NCHW_VECT_C() argument 126 int hend = min(hstart + kernel_h, height); in MaxPoolForwardNoMaskKernel_NCHW_VECT_C() 147 const int pooled_width, const int kernel_h, const int kernel_w, in MaxPoolForwardNHWC() argument 159 int hend = min(hstart + kernel_h, height); in MaxPoolForwardNHWC() 234 const int width, const int kernel_h, const int kernel_w, const int stride_h, in MaxPoolGradBackwardNoMaskNCHW() argument 245 const int hend = min(hstart + kernel_h, height); in MaxPoolGradBackwardNoMaskNCHW() 275 const int width, const int kernel_h, const int kernel_w, const int stride_h, in MaxPoolGradBackwardNoMaskNHWC() argument 287 int hend = min(hstart + kernel_h, height); in MaxPoolGradBackwardNoMaskNHWC() [all …]
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D | pooling_ops_3d_gpu.cu.cc | 35 const int kernel_h, const int kernel_w, const int stride_p, in MaxPoolGradBackwardNoMaskNCDHW() argument 50 const int hend = min(hstart + kernel_h, height); in MaxPoolGradBackwardNoMaskNCDHW() 86 const int kernel_h, const int kernel_w, const int stride_p, in MaxPoolGradBackwardNoMaskNDHWC() argument 100 int hend = min(hstart + kernel_h, height); in MaxPoolGradBackwardNoMaskNDHWC() 141 const int height, const int width, const int kernel_p, const int kernel_h, in operator ()() argument 153 height, width, kernel_p, kernel_h, kernel_w, stride_p, stride_h, in operator ()() 160 height, width, kernel_p, kernel_h, kernel_w, stride_p, stride_h, in operator ()()
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D | maxpooling_op_gpu.h | 39 const int pooled_width, const int kernel_h, 49 const int pooled_width, const int kernel_h, 77 const int kernel_h, const int kernel_w, const int stride_h,
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D | pooling_ops_3d_gpu.h | 38 const int width, const int kernel_p, const int kernel_h,
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D | avgpooling_op.h | 68 const int pooled_width, const int kernel_h,
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/external/ComputeLibrary/src/runtime/heuristics/dwc_native/ |
D | ClDWCNativeHeuristicsHelpers.cpp | 43 const size_t kernel_h = weights->tensor_shape()[idx_h]; in use_cl_image_for_weights() local 48 if((kernel_w == 1) && (kernel_h == 1)) in use_cl_image_for_weights()
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/external/tensorflow/tensorflow/lite/tools/versioning/ |
D | gpu_compatibility.cc | 205 absl::Status CheckKernels(int kernel_h, int kernel_w) { in CheckKernels() argument 206 if (kernel_h <= 0 || kernel_w <= 0) { in CheckKernels() 208 absl::StrCat("Incorrect kernel values: kernel_height = ", kernel_h, in CheckKernels() 214 absl::Status CheckKernelsAndStrides(int kernel_h, int kernel_w, int strides_h, in CheckKernelsAndStrides() argument 216 RETURN_IF_ERROR(CheckKernels(kernel_h, kernel_w)); in CheckKernelsAndStrides()
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/external/tensorflow/tensorflow/python/keras/layers/ |
D | convolutional.py | 1292 kernel_h, kernel_w = self.kernel_size 1302 kernel_h, 1351 kernel_h, kernel_w = self.kernel_size 1362 kernel_h, 1594 kernel_d, kernel_h, kernel_w = self.kernel_size 1609 kernel_h, 1659 kernel_d, kernel_h, kernel_w = self.kernel_size 1676 kernel_h,
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/external/tensorflow/tensorflow/compiler/mlir/tosa/transforms/ |
D | legalize_tfl.cc | 884 int64_t kernel_h = tfl_avgpool_op.filter_height(); in matchAndRewrite() local 886 kernel_size = rewriter.getI64ArrayAttr({kernel_h, kernel_w}); in matchAndRewrite() 888 i64array[1] = kernel_h; in matchAndRewrite() 961 int64_t kernel_h = tfl_maxpool_op.filter_height(); in matchAndRewrite() local 963 kernel_size = rewriter.getI64ArrayAttr({kernel_h, kernel_w}); in matchAndRewrite() 965 i64array[1] = kernel_h; in matchAndRewrite()
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D | legalize_tf.cc | 532 int64_t kernel_h = tmpAttr[1].dyn_cast<IntegerAttr>().getInt(); in matchAndRewrite() local 534 kernel = rewriter.getI64ArrayAttr({kernel_h, kernel_w}); in matchAndRewrite() 602 int64_t kernel_h = tmpAttr[1].dyn_cast<IntegerAttr>().getInt(); in matchAndRewrite() local 604 kernel = rewriter.getI64ArrayAttr({kernel_h, kernel_w}); in matchAndRewrite()
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