Home
last modified time | relevance | path

Searched refs:ld1rw (Results 1 – 9 of 9) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12515 "ld1rw\005ld1sb\005ld1sh\005ld1sw\004ld1w\003ld2\004ld2b\004ld2d\004ld2h"
15224 …{ 1945 /* ld1rw */, AArch64::LD1RW_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5…
15225 …{ 1945 /* ld1rw */, AArch64::LD1RW_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1…
15226 …{ 1945 /* ld1rw */, AArch64::LD1RW_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg…
15227 …{ 1945 /* ld1rw */, AArch64::LD1RW_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__R…
15228 …{ 1945 /* ld1rw */, AArch64::LD1RW_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5…
15229 …{ 1945 /* ld1rw */, AArch64::LD1RW_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1…
15230 …{ 1945 /* ld1rw */, AArch64::LD1RW_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg…
15231 …{ 1945 /* ld1rw */, AArch64::LD1RW_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__R…
22597 …{ 1945 /* ld1rw */, AArch64::LD1RW_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5…
[all …]
DAArch64GenAsmWriter.inc22317 /* 3757 */ "ld1rw $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0"
22318 /* 3782 */ "ld1rw $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0"
DAArch64GenAsmWriter1.inc23038 /* 3749 */ "ld1rw $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0"
23039 /* 3774 */ "ld1rw $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0"
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td370 defm LD1RW_IMM : sve_mem_ld_dup<0b10, 0b10, "ld1rw", Z_s, ZPR32, uimm6s4>;
371 defm LD1RW_D_IMM : sve_mem_ld_dup<0b10, 0b11, "ld1rw", Z_d, ZPR64, uimm6s4>;
/external/vixl/src/aarch64/
Dassembler-aarch64.h4589 void ld1rw(const ZRegister& zt,
Dassembler-sve-aarch64.cc4179 void Assembler::ld1rw(const ZRegister& zt, in ld1rw() function in vixl::aarch64::Assembler
Dmacro-assembler-aarch64.h4851 &MacroAssembler::ld1rw, in Ld1rw()
/external/vixl/test/aarch64/
Dtest-disasm-sve-aarch64.cc3473 COMPARE(ld1rw(z19.VnS(), p5.Zeroing(), SVEMemOperand(x4, 252)), in TEST()
3475 COMPARE(ld1rw(z13.VnD(), p3.Zeroing(), SVEMemOperand(x2, 100)), in TEST()
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md8564 void ld1rw(const ZRegister& zt,