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Searched refs:ld1sb (Results 1 – 16 of 16) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12515 "ld1rw\005ld1sb\005ld1sh\005ld1sw\004ld1w\003ld2\004ld2b\004ld2d\004ld2h"
15232 …{ 1951 /* ld1sb */, AArch64::LD1SB_H_IMM, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1…
15233 …{ 1951 /* ld1sb */, AArch64::LD1SB_S_IMM, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1…
15234 …{ 1951 /* ld1sb */, AArch64::GLD1SB_S_IMM_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1…
15235 …{ 1951 /* ld1sb */, AArch64::LD1SB_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1…
15236 …{ 1951 /* ld1sb */, AArch64::GLD1SB_D_IMM_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1…
15237 …{ 1951 /* ld1sb */, AArch64::LD1SB_H_IMM, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__R…
15238 …{ 1951 /* ld1sb */, AArch64::LD1SB_S_IMM, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__R…
15239 …{ 1951 /* ld1sb */, AArch64::GLD1SB_S_IMM_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg…
15240 …{ 1951 /* ld1sb */, AArch64::LD1SB_D_IMM, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__R…
[all …]
DAArch64GenAsmWriter.inc22221 /* 1838 */ "ld1sb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
22222 /* 1865 */ "ld1sb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
22327 /* 3967 */ "ld1sb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0"
22328 /* 3992 */ "ld1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
22329 /* 4017 */ "ld1sb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0"
DAArch64GenAsmWriter1.inc22942 /* 1838 */ "ld1sb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\xFF\x03\x10]\0"
22943 /* 1865 */ "ld1sb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\xFF\x03\x0B]\0"
23048 /* 3959 */ "ld1sb $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0"
23049 /* 3984 */ "ld1sb $\xFF\x01\x24, $\xFF\x02\x07/z, [$\x03]\0"
23050 /* 4009 */ "ld1sb $\xFF\x01\x21, $\xFF\x02\x07/z, [$\x03]\0"
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td354 defm LD1SB_D_IMM : sve_mem_cld_si<0b1100, "ld1sb", Z_d, ZPR64>;
355 defm LD1SB_S_IMM : sve_mem_cld_si<0b1101, "ld1sb", Z_s, ZPR32>;
356 defm LD1SB_H_IMM : sve_mem_cld_si<0b1110, "ld1sb", Z_h, ZPR16>;
400 defm LD1SB_D : sve_mem_cld_ss<0b1100, "ld1sb", Z_d, ZPR64, GPR64NoXZRshifted8>;
401 defm LD1SB_S : sve_mem_cld_ss<0b1101, "ld1sb", Z_s, ZPR32, GPR64NoXZRshifted8>;
402 defm LD1SB_H : sve_mem_cld_ss<0b1110, "ld1sb", Z_h, ZPR16, GPR64NoXZRshifted8>;
471 …defm GLD1SB_S : sve_mem_32b_gld_vs_32_unscaled<0b0000, "ld1sb", AArch64ld1s_gather_sxtw, AAr…
493 …defm GLD1SB_S : sve_mem_32b_gld_vi_32_ptrs<0b0000, "ld1sb", imm0_31, AArch64ld1s_gather_imm, …
506 …defm GLD1SB_D : sve_mem_64b_gld_vi_64_ptrs<0b0000, "ld1sb", imm0_31, AArch64ld1s_gather_imm, …
523 defm GLD1SB_D : sve_mem_64b_gld_vs2_64_unscaled<0b0000, "ld1sb", AArch64ld1s_gather, nxv2i8>;
[all …]
/external/vixl/test/aarch64/
Dtest-assembler-sve-aarch64.cc9029 Ld1Macro ld1sb = &MacroAssembler::Ld1sb; in TEST_SVE() local
9030 ldff1_unscaled_offset_helper(kBRegSize, kHRegSize, ldff1sb, ld1sb); in TEST_SVE()
9031 ldff1_unscaled_offset_helper(kBRegSize, kSRegSize, ldff1sb, ld1sb); in TEST_SVE()
9032 ldff1_unscaled_offset_helper(kBRegSize, kDRegSize, ldff1sb, ld1sb); in TEST_SVE()
9129 Ld1Macro ld1sb = &MacroAssembler::Ld1sb; in sve_ldff1_scalar_plus_vector_32_unscaled_offset() local
9130 ldff1_32_unscaled_offset_helper(kBRegSize, ldff1sb, ld1sb, UXTW); in sve_ldff1_scalar_plus_vector_32_unscaled_offset()
9131 ldff1_32_unscaled_offset_helper(kBRegSize, ldff1sb, ld1sb, SXTW); in sve_ldff1_scalar_plus_vector_32_unscaled_offset()
9214 Ld1Macro ld1sb = &MacroAssembler::Ld1sb; in sve_ldff1_scalar_plus_vector_32_unpacked_unscaled_offset() local
9215 ldff1_32_unpacked_unscaled_offset_helper(kBRegSize, ldff1sb, ld1sb, UXTW); in sve_ldff1_scalar_plus_vector_32_unpacked_unscaled_offset()
9216 ldff1_32_unpacked_unscaled_offset_helper(kBRegSize, ldff1sb, ld1sb, SXTW); in sve_ldff1_scalar_plus_vector_32_unpacked_unscaled_offset()
[all …]
Dtest-disasm-sve-aarch64.cc3415 COMPARE(ld1sb(z12.VnS(), p7.Zeroing(), SVEMemOperand(x17, z23.VnS(), UXTW)), in TEST()
3417 COMPARE(ld1sb(z22.VnS(), p3.Zeroing(), SVEMemOperand(x23, z23.VnS(), SXTW)), in TEST()
3532 COMPARE(ld1sb(z16.VnD(), p7.Zeroing(), SVEMemOperand(z31.VnD())), in TEST()
3645 COMPARE(ld1sb(z11.VnD(), p3.Zeroing(), SVEMemOperand(x24, z21.VnD())), in TEST()
3671 COMPARE(ld1sb(z4.VnD(), p1.Zeroing(), SVEMemOperand(x24, z15.VnD(), SXTW)), in TEST()
4816 COMPARE(ld1sb(z15.VnH(), p1.Zeroing(), SVEMemOperand(x15, 7, SVE_MUL_VL)), in TEST()
4818 COMPARE(ld1sb(z19.VnS(), p2.Zeroing(), SVEMemOperand(sp, -8, SVE_MUL_VL)), in TEST()
4822 COMPARE(ld1sb(z5.VnH(), p1.Zeroing(), SVEMemOperand(x15, x1, LSL, 0)), in TEST()
4824 COMPARE(ld1sb(z9.VnS(), p2.Zeroing(), SVEMemOperand(x29, x3, LSL, 0)), in TEST()
4826 COMPARE(ld1sb(z31.VnD(), p7.Zeroing(), SVEMemOperand(x9, x9, LSL, 0)), in TEST()
Dtest-trace-aarch64.cc2792 __ ld1sb(z21.VnH(), p1.Zeroing(), SVEMemOperand(x0, 3, SVE_MUL_VL)); in GenerateTestSequenceSVE() local
2793 __ ld1sb(z22.VnS(), p1.Zeroing(), SVEMemOperand(x0, 3, SVE_MUL_VL)); in GenerateTestSequenceSVE() local
2794 __ ld1sb(z23.VnD(), p2.Zeroing(), SVEMemOperand(x0, x2)); in GenerateTestSequenceSVE() local
/external/vixl/src/aarch64/
Dmacro-assembler-sve-aarch64.cc1355 static_cast<SVELoad1Fn>(&Assembler::ld1sb)); in Ld1sb()
Dassembler-aarch64.h4654 void ld1sb(const ZRegister& zt,
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour2423 0x~~~~~~~~~~~~~~~~ a5c3a415 ld1sb {z21.h}, p1/z, [x0, #3, mul vl]
2424 0x~~~~~~~~~~~~~~~~ a5a3a416 ld1sb {z22.s}, p1/z, [x0, #3, mul vl]
2425 0x~~~~~~~~~~~~~~~~ a5824817 ld1sb {z23.d}, p2/z, [x0, x2]
Dlog-disasm2423 0x~~~~~~~~~~~~~~~~ a5c3a415 ld1sb {z21.h}, p1/z, [x0, #3, mul vl]
2424 0x~~~~~~~~~~~~~~~~ a5a3a416 ld1sb {z22.s}, p1/z, [x0, #3, mul vl]
2425 0x~~~~~~~~~~~~~~~~ a5824817 ld1sb {z23.d}, p2/z, [x0, x2]
Dlog-cpufeatures-custom2422 0x~~~~~~~~~~~~~~~~ a5c3a415 ld1sb {z21.h}, p1/z, [x0, #3, mul vl] ### {SVE} ###
2423 0x~~~~~~~~~~~~~~~~ a5a3a416 ld1sb {z22.s}, p1/z, [x0, #3, mul vl] ### {SVE} ###
2424 0x~~~~~~~~~~~~~~~~ a5824817 ld1sb {z23.d}, p2/z, [x0, x2] ### {SVE} ###
Dlog-cpufeatures2422 0x~~~~~~~~~~~~~~~~ a5c3a415 ld1sb {z21.h}, p1/z, [x0, #3, mul vl] // Needs: SVE
2423 0x~~~~~~~~~~~~~~~~ a5a3a416 ld1sb {z22.s}, p1/z, [x0, #3, mul vl] // Needs: SVE
2424 0x~~~~~~~~~~~~~~~~ a5824817 ld1sb {z23.d}, p2/z, [x0, x2] // Needs: SVE
Dlog-cpufeatures-colour2422 0x~~~~~~~~~~~~~~~~ a5c3a415 ld1sb {z21.h}, p1/z, [x0, #3, mul vl] SVE
2423 0x~~~~~~~~~~~~~~~~ a5a3a416 ld1sb {z22.s}, p1/z, [x0, #3, mul vl] SVE
2424 0x~~~~~~~~~~~~~~~~ a5824817 ld1sb {z23.d}, p2/z, [x0, x2] SVE
Dlog-all10568 0x~~~~~~~~~~~~~~~~ a5c3a415 ld1sb {z21.h}, p1/z, [x0, #3, mul vl]
10597 0x~~~~~~~~~~~~~~~~ a5a3a416 ld1sb {z22.s}, p1/z, [x0, #3, mul vl]
10616 0x~~~~~~~~~~~~~~~~ a5824817 ld1sb {z23.d}, p2/z, [x0, x2]
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md8573 void ld1sb(const ZRegister& zt,