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Searched refs:ld2d (Results 1 – 15 of 15) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td451 defm LD2D_IMM : sve_mem_eld_si<0b11, 0b01, ZZ_d, "ld2d", simm4s2>;
465 def LD2D : sve_mem_eld_ss<0b11, 0b01, ZZ_d, "ld2d", GPR64NoXZRshifted64>;
/external/vixl/test/aarch64/
Dtest-disasm-sve-aarch64.cc3915 COMPARE(ld2d(z0.VnD(), z1.VnD(), p7.Zeroing(), SVEMemOperand(x19)), in TEST()
3917 COMPARE(ld2d(z31.VnD(), in TEST()
3922 COMPARE(ld2d(z31.VnD(), in TEST()
4148 COMPARE(ld2d(z16.VnD(), in TEST()
4153 COMPARE(ld2d(z25.VnD(), in TEST()
4158 COMPARE(ld2d(z25.VnD(), in TEST()
Dtest-trace-aarch64.cc2807 __ ld2d(z23.VnD(), z24.VnD(), p5.Zeroing(), SVEMemOperand(x0, 4, SVE_MUL_VL)); in GenerateTestSequenceSVE() local
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12515 "ld1rw\005ld1sb\005ld1sh\005ld1sw\004ld1w\003ld2\004ld2b\004ld2d\004ld2h"
15439 …{ 1983 /* ld2d */, AArch64::LD2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_…
15440 …{ 1983 /* ld2d */, AArch64::LD2D, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_5__G…
15441 …{ 1983 /* ld2d */, AArch64::LD2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_…
22812 …{ 1983 /* ld2d */, AArch64::LD2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_…
22813 …{ 1983 /* ld2d */, AArch64::LD2D, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_5__G…
22814 …{ 1983 /* ld2d */, AArch64::LD2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_…
32769 { 1983 /* ld2d */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE },
32770 { 1983 /* ld2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
32771 { 1983 /* ld2d */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE },
[all …]
DAArch64GenAsmWriter.inc22356 /* 4601 */ "ld2d $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0"
DAArch64GenAsmWriter1.inc23077 /* 4593 */ "ld2d $\xFF\x01\x20, $\xFF\x02\x07/z, [$\x03]\0"
/external/vixl/src/aarch64/
Dassembler-aarch64.h4689 void ld2d(const ZRegister& zt1,
Dmacro-assembler-aarch64.h4957 ld2d(zt1, zt2, pg, addr); in Ld2d()
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour2436 0x~~~~~~~~~~~~~~~~ a5a2f417 ld2d {z23.d, z24.d}, p5/z, [x0, #4, mul vl]
Dlog-disasm2436 0x~~~~~~~~~~~~~~~~ a5a2f417 ld2d {z23.d, z24.d}, p5/z, [x0, #4, mul vl]
Dlog-cpufeatures-custom2435 0x~~~~~~~~~~~~~~~~ a5a2f417 ld2d {z23.d, z24.d}, p5/z, [x0, #4, mul vl] ### {SVE} ###
Dlog-cpufeatures2435 0x~~~~~~~~~~~~~~~~ a5a2f417 ld2d {z23.d, z24.d}, p5/z, [x0, #4, mul vl] // Needs: SVE
Dlog-cpufeatures-colour2435 0x~~~~~~~~~~~~~~~~ a5a2f417 ld2d {z23.d, z24.d}, p5/z, [x0, #4, mul vl] SVE
Dlog-all11014 0x~~~~~~~~~~~~~~~~ a5a2f417 ld2d {z23.d, z24.d}, p5/z, [x0, #4, mul vl]
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md8619 void ld2d(const ZRegister& zt1,