| /external/llvm/test/CodeGen/AArch64/ |
| D | cmpxchg-idioms.ll | 33 ; CHECK: ldaxrb [[LOADED:w[0-9]+]], [x0]
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| D | cmpxchg-O0.ll | 6 ; CHECK: ldaxrb [[OLD:w[0-9]+]], [x0]
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| D | atomic-ops.ll | 23 ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
263 ; ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
343 ; ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
500 ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
597 ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
791 ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
889 ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
|
| D | arm64-ldxr-stxr.ll | 174 ; CHECK: ldaxrb w[[LOADVAL:[0-9]+]], [x0]
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-memory.s | 512 ldaxrb w2, [x4, #0]
519 ; CHECK: ldaxrb w2, [x4] ; encoding: [0x82,0xfc,0x5f,0x08]
|
| D | basic-a64-instructions.s | 2294 ldaxrb w19, [x21]
|
| /external/vixl/ |
| D | README.md | 166 `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-memory.txt | 500 # CHECK: ldaxrb w2, [x4]
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| D | basic-a64-instructions.txt | 1964 #CHECK: ldaxrb w8, [x4]
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| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 1621 COMPARE(ldaxrb(w9, MemOperand(x10)), "ldaxrb w9, [x10]"); in TEST()
1622 COMPARE(ldaxrb(w11, MemOperand(sp)), "ldaxrb w11, [sp]"); in TEST()
1623 COMPARE(ldaxrb(x12, MemOperand(x13)), "ldaxrb w12, [x13]"); in TEST()
1624 COMPARE(ldaxrb(x14, MemOperand(sp)), "ldaxrb w14, [sp]"); in TEST()
|
| D | test-trace-aarch64.cc | 164 __ ldaxrb(w15, MemOperand(x0)); in GenerateTestSequenceBase() local
165 __ ldaxrb(x16, MemOperand(x0)); in GenerateTestSequenceBase() local
|
| D | test-cpu-features-aarch64.cc | 282 TEST_NONE(ldaxrb_0, ldaxrb(w0, MemOperand(x1, 0)))
|
| /external/capstone/suite/MC/AArch64/ |
| D | basic-a64-instructions.s.cs | 892 0xb3,0xfe,0x5f,0x08 = ldaxrb w19, [x21]
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 108 0x~~~~~~~~~~~~~~~~ 085ffc0f ldaxrb w15, [x0]
109 0x~~~~~~~~~~~~~~~~ 085ffc10 ldaxrb w16, [x0]
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| D | log-disasm | 108 0x~~~~~~~~~~~~~~~~ 085ffc0f ldaxrb w15, [x0]
109 0x~~~~~~~~~~~~~~~~ 085ffc10 ldaxrb w16, [x0]
|
| D | log-cpufeatures-custom | 108 0x~~~~~~~~~~~~~~~~ 085ffc0f ldaxrb w15, [x0]
109 0x~~~~~~~~~~~~~~~~ 085ffc10 ldaxrb w16, [x0]
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| D | log-cpufeatures | 108 0x~~~~~~~~~~~~~~~~ 085ffc0f ldaxrb w15, [x0]
109 0x~~~~~~~~~~~~~~~~ 085ffc10 ldaxrb w16, [x0]
|
| D | log-cpufeatures-colour | 108 0x~~~~~~~~~~~~~~~~ 085ffc0f ldaxrb w15, [x0]
109 0x~~~~~~~~~~~~~~~~ 085ffc10 ldaxrb w16, [x0]
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| D | log-all | 499 0x~~~~~~~~~~~~~~~~ 085ffc0f ldaxrb w15, [x0]
502 0x~~~~~~~~~~~~~~~~ 085ffc10 ldaxrb w16, [x0]
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 1333 void ldaxrb(const Register& rt, const MemOperand& src);
|
| D | assembler-aarch64.cc | 1492 void Assembler::ldaxrb(const Register& rt, const MemOperand& src) { in ldaxrb() function in vixl::aarch64::Assembler
|
| D | macro-assembler-aarch64.h | 1735 ldaxrb(rt, src); in Ldaxrb()
|
| /external/capstone/arch/AArch64/ |
| D | AArch64MappingInsnOp.inc | 3593 { /* AArch64_LDAXRB, ARM64_INS_LDAXRB: ldaxrb $rt, [$rn] */
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 1037 void ldaxrb(const Register& rt, const MemOperand& src)
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2440 def LDAXRB : LoadExclusive <0b00, 0, 1, 0, 1, GPR32, "ldaxrb">;
|