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Searched refs:ldm (Results 1 – 25 of 93) sorted by relevance

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/external/arm-trusted-firmware/include/arch/aarch32/
Dsmccc_macros.S175 ldm r1!, {sp, lr}
178 ldm r1!, {r2, sp, lr}
182 ldm r1!, {r2, sp, lr}
186 ldm r1!, {r2, sp, lr}
190 ldm r1!, {r2, sp, lr}
194 ldm r1!, {r2, sp, lr}
198 ldm r1!, {r2}
204 ldm r1!, {r4-r12}
215 ldm r1!, {r4-r12}
237 ldm r0, {r0-r12}
/external/llvm/test/CodeGen/Thumb/
Dldm-stm-base-materialization.ll16 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
18 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
37 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
39 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]], r[[R4:[0-9]]]}
58 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]], r[[R4:[0-9]]]}
60 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]], r[[R4:[0-9]]]}
79 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
81 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
83 ; CHECK-NEXT: ldm r[[NLB]]!, {r[[R1:[0-9]]], r[[R2:[0-9]]], r[[R3:[0-9]]]}
Dldm-stm-base-materialization-thumb2.ll17 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
36 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]]}
38 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
57 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0…
59 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
78 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0…
80 ; CHECK-NEXT: ldm{{(\.w)?}} [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-…
Dthumb-ldm.ll8 ; CHECK: ldm
19 ; CHECK: ldm
31 ; CHECK: ldm
/external/llvm/test/MC/ARM/
Dthumb-load-store-multiple.s11 .global ldm symbol
12 .type ldm,%function
13 ldm: label
14 ldm r0!, {r1, sp}
16 @ CHECK: ldm r0!, {r1, sp}
18 ldm r0!, {lr, pc}
20 @ CHECK: ldm r0!, {lr, pc}
Dthumb-diagnostics.s59 ldm r2!, {r5, r8}
60 ldm r2, {r5, r7}
61 ldm r2!, {r2, r3, r4}
62 ldm r2!, {r2, r3, r4, r10}
64 ldm r0, {r2, sp}
72 @ CHECK-ERRORS: ldm r2!, {r5, r8}
75 @ CHECK-ERRORS: ldm r2, {r5, r7}
78 @ CHECK-ERRORS: ldm r2!, {r2, r3, r4}
81 @ CHECK-ERRORS-V8: ldm r2!, {r2, r3, r4, r10}
87 @ CHECK-ERRORS-V7M: ldm r0, {r2, sp}
Darm-load-store-multiple-deprecated.s151 .global ldm symbol
152 .type ldm,%function
153 ldm: label
154 ldm r0!, {r1, sp}
156 ldm r0!, {sp}
158 ldm r0!, {r1, lr, pc}
160 ldm r0!, {lr, pc}
Dbasic-thumb-instructions.s250 ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7}
251 ldm r2!, {r1, r3, r4, r5, r7}
252 ldm r1, {r1}
254 @ CHECK: ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7} @ encoding: [0xff,0xcb]
255 @ CHECK: ldm r2!, {r1, r3, r4, r5, r7} @ encoding: [0xba,0xca]
256 @ CHECK: ldm r1, {r1} @ encoding: [0x02,0xc9]
/external/llvm/test/CodeGen/ARM/
Dmemcpy-ldm-stm.ll22 ; CHECK-NEXT: ldm{{(\.w)?}} [[LB]]!,
39 ; CHECK-NEXT: ldm{{(\.w)?}} [[LB]]!,
74 ; 3 ldm/stm pairs in v6; 2 in v7
75 ; CHECK: ldm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1:{.*}]]
77 ; CHECK: ldm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST2:{.*}]]
79 ; CHECKV6: ldm {{r[0-7]!?}}, [[REGLIST3:{.*}]]
81 ; CHECKV7-NOT: ldm
Dldm-stm-base-materialization.ll17 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]], [[R…
36 ; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]]}
38 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
57 ; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
59 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
78 ; CHECK-NEXT: ldm [[NLB]]!, {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]]}
80 ; CHECK-NEXT: ldm [[NLB]], {[[R1:[rl0-9]+]], [[R2:[rl0-9]+]], [[R3:[rl0-9]+]], [[R4:[rl0-9]+]], [[R…
Dsegmented-stacks.ll30 ; ARM-linux-NEXT: ldm sp!, {lr}
49 ; ARM-android-NEXT: ldm sp!, {lr}
77 ; ARM-linux-NEXT: ldm sp!, {lr}
96 ; ARM-android-NEXT: ldm sp!, {lr}
122 ; ARM-linux-NEXT: ldm sp!, {lr}
141 ; ARM-android-NEXT: ldm sp!, {lr}
167 ; ARM-linux-NEXT: ldm sp!, {lr}
186 ; ARM-android-NEXT: ldm sp!, {lr}
212 ; ARM-linux-NEXT: ldm sp!, {lr}
231 ; ARM-android-NEXT: ldm sp!, {lr}
D2013-01-21-PR14992.ll16 ;EXPECTED: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], {{r[0-9]+}},
17 ;CHECK-NOT: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], [[REG]],
D2015-01-21-thumbv4t-ldstr-opt.ll14 ; CHECK-NEXT: ldm [[NEWBASE]],
38 ; CHECK-NEXT: ldm [[NEWBASE]],
Dt2-shrink-ldrpost.ll7 ; CHECK: ldm r{{[0-9]}}!, {r[[x:[0-9]]]}
32 ; CHECK-NOT: ldm
D2012-10-04-AAPCS-byval-align8.ll31 ; ldm is not formed when the coalescer failed to coalesce everything.
58 ; ldm is not formed when the coalescer failed to coalesce everything.
D2011-11-28-DAGCombineBug.ll5 ; combined them into a ldm which causes runtime exception.
16 ; CHECK-NOT: ldm
Dsegmented-stacks-dynamic.ll36 ; ARM-linux-NEXT: ldm sp!, {lr}
56 ; ARM-android-NEXT: ldm sp!, {lr}
Dgpr-paired-spill.ll33 ; CHECK-WITHOUT-LDRD: ldm [[ADDRREG]], {r{{[0-9]+}}, r{{[0-9]+}}}
34 ; CHECK-WITHOUT-LDRD: ldm sp, {r{{[0-9]+}}, r{{[0-9]+}}}
Darm-modifier.ll51 ; CHECK: ldm {{lr|r[0-9]+}}, {r{{[0-9]+}}, r{{[0-9]+}}}
56 %1 = call i64 asm sideeffect "ldm ${1:m}, ${0:M}\0A\09", "=r,*m"(i64** @f3_ptr) nounwind
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-ldm.ll11 ; CONSERVATIVE-NOT: ldm
22 ; CHECK: ldm
24 ; CONSERVATIVE-NOT: ldm
36 ; CHECK: ldm
38 ; CONSERVATIVE-NOT: ldm
53 ; ALL: ldm.w sp, {r0, r1, r2}
/external/aac/libFDK/src/
Dfft_rad2.cpp134 INT trigstep, i, ldm; in dit_fft() local
166 for (ldm = 3; ldm <= ldn; ++ldm) { in dit_fft()
167 INT m = (1 << ldm); in dit_fft()
171 trigstep = ((trigDataSize << 2) >> ldm); in dit_fft()
/external/python/cpython2/Modules/_ctypes/libffi/src/avr32/
Dsysv.S62 ldm sp++, r8-r12
131 ldm sp++, r0,r1,pc
200 ldm sp++, r0,lr
/external/libffi/src/avr32/
Dsysv.S62 ldm sp++, r8-r12
131 ldm sp++, r0,r1,pc
200 ldm sp++, r0,lr
/external/capstone/suite/MC/ARM/
Dbasic-thumb-instructions.s.cs45 0xff,0xcb = ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7}
46 0xba,0xca = ldm r2!, {r1, r3, r4, r5, r7}
47 0x02,0xc9 = ldm r1, {r1}
Dbasic-thumb2-instructions.s.cs244 0x94,0xe8,0x30,0x03 = ldm.w r4, {r4, r5, r8, r9}
245 0x94,0xe8,0x60,0x00 = ldm.w r4, {r5, r6}
246 0xb5,0xe8,0x08,0x01 = ldm.w r5!, {r3, r8}
247 0x94,0xe8,0x30,0x03 = ldm.w r4, {r4, r5, r8, r9}
248 0x94,0xe8,0x60,0x00 = ldm.w r4, {r5, r6}
249 0xb5,0xe8,0x08,0x01 = ldm.w r5!, {r3, r8}
250 0xb5,0xe8,0x06,0x00 = ldm.w r5!, {r1, r2}
251 0x92,0xe8,0x06,0x00 = ldm.w r2, {r1, r2}
252 0x94,0xe8,0x30,0x03 = ldm.w r4, {r4, r5, r8, r9}
253 0x94,0xe8,0x60,0x00 = ldm.w r4, {r5, r6}
[all …]

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