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Searched refs:list_1 (Results 1 – 6 of 6) sorted by relevance

/external/vixl/src/aarch64/
Doperands-aarch64.h154 static CPURegList Union(const CPURegList& list_1, const CPURegList& list_2) { in Union() argument
155 VIXL_ASSERT(list_1.type_ == list_2.type_); in Union()
156 VIXL_ASSERT(list_1.size_ == list_2.size_); in Union()
157 return CPURegList(list_1.type_, list_1.size_, list_1.list_ | list_2.list_); in Union()
159 static CPURegList Union(const CPURegList& list_1,
162 static CPURegList Union(const CPURegList& list_1,
167 static CPURegList Intersection(const CPURegList& list_1, in Intersection() argument
169 VIXL_ASSERT(list_1.type_ == list_2.type_); in Intersection()
170 VIXL_ASSERT(list_1.size_ == list_2.size_); in Intersection()
171 return CPURegList(list_1.type_, list_1.size_, list_1.list_ & list_2.list_); in Intersection()
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Doperands-aarch64.cc84 CPURegList CPURegList::Union(const CPURegList& list_1, in Union() argument
87 return Union(list_1, Union(list_2, list_3)); in Union()
91 CPURegList CPURegList::Union(const CPURegList& list_1, in Union() argument
95 return Union(Union(list_1, list_2), Union(list_3, list_4)); in Union()
99 CPURegList CPURegList::Intersection(const CPURegList& list_1, in Intersection() argument
102 return Intersection(list_1, Intersection(list_2, list_3)); in Intersection()
106 CPURegList CPURegList::Intersection(const CPURegList& list_1, in Intersection() argument
110 return Intersection(Intersection(list_1, list_2), in Intersection()
/external/vixl/src/aarch32/
Dinstructions-aarch32.h496 static RegisterList Union(const RegisterList& list_1,
498 return RegisterList(list_1.list_ | list_2.list_);
500 static RegisterList Union(const RegisterList& list_1,
503 return Union(list_1, Union(list_2, list_3));
505 static RegisterList Union(const RegisterList& list_1,
509 return Union(Union(list_1, list_2), Union(list_3, list_4));
511 static RegisterList Intersection(const RegisterList& list_1,
513 return RegisterList(list_1.list_ & list_2.list_);
515 static RegisterList Intersection(const RegisterList& list_1,
518 return Intersection(list_1, Intersection(list_2, list_3));
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/external/libxml2/result/relaxng/
Dlist_1.err1 ./test/relaxng/list_1.xml:1: element elem1: Relax-NG validity error : Element elem1 failed to valid…
2 ./test/relaxng/list_1.xml fails to validate
/external/python/absl-py/absl/flags/tests/
Dflags_test.py2584 def _assert_lists_have_same_elements(self, list_1, list_2): argument
2587 list_1 = list(list_1)
2588 list_1.sort()
2591 self.assertListEqual(list_1, list_2)
/external/vixl/test/aarch64/
Dtest-assembler-aarch64.cc7773 CPURegList list_1(x1, x2, x3, x4); in TEST() local
7775 int list_1_size = list_1.GetTotalSizeInBytes(); in TEST()
7779 __ PokeCPURegList(list_1, 0); in TEST()
7780 __ PokeXRegList(list_1.GetList(), list_1_size); in TEST()