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/external/XNNPACK/src/xnnpack/
Dmicroparams.h1422 uint16_t minus_ln2; member
1435 XNN_ALIGN(32) float minus_ln2[8];
1510 float minus_ln2; member
1524 float minus_ln2; member
1617 XNN_ALIGN(32) float minus_ln2[8];
1630 XNN_ALIGN(32) float minus_ln2[8];
1644 XNN_ALIGN(32) float minus_ln2[8];
1657 XNN_ALIGN(32) float minus_ln2[8];
1672 float minus_ln2; member
1684 float minus_ln2; member
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/external/XNNPACK/src/f32-vsigmoid/gen/
Dvsigmoid-avx512f-rr1-p5-scalef-div-x16.c29 const __m512 vminus_ln2 = _mm512_set1_ps(params->avx512_rr1_p5.minus_ln2); in xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x16()
Dvsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x16.c31 const __m512 vminus_ln2 = _mm512_set1_ps(params->avx512_rr1_lut16_p3.minus_ln2); in xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x16()
Dvsigmoid-avx512f-rr1-lut16-p3-perm-scalef-nr1fma-x16.c31 const __m512 vminus_ln2 = _mm512_set1_ps(params->avx512_rr1_lut16_p3.minus_ln2); in xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_nr1fma_x16()
Dvsigmoid-avx512f-rr1-p5-scalef-nr1fma-x16.c29 const __m512 vminus_ln2 = _mm512_set1_ps(params->avx512_rr1_p5.minus_ln2); in xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_nr1fma_x16()
Dvsigmoid-avx2-rr1-p5-div-x8.c29 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p5.minus_ln2); in xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_div_x8()
Dvsigmoid-avx2-rr1-p5-nr2fma-x8.c29 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p5.minus_ln2); in xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr2fma_x8()
Dvsigmoid-avx2-rr1-p5-nr1fma-x8.c29 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p5.minus_ln2); in xnn_f32_vsigmoid_ukernel__avx2_rr1_p5_nr1fma_x8()
Dvsigmoid-avx512f-rr1-lut16-p3-perm-scalef-div-x32.c31 const __m512 vminus_ln2 = _mm512_set1_ps(params->avx512_rr1_lut16_p3.minus_ln2); in xnn_f32_vsigmoid_ukernel__avx512f_rr1_lut16_p3_perm_scalef_div_x32()
Dvsigmoid-avx512f-rr1-p5-scalef-div-x32.c29 const __m512 vminus_ln2 = _mm512_set1_ps(params->avx512_rr1_p5.minus_ln2); in xnn_f32_vsigmoid_ukernel__avx512f_rr1_p5_scalef_div_x32()
/external/XNNPACK/src/f16-vsigmoid/gen/
Dvsigmoid-avx2-rr1-p2-div-x8.c30 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p2.minus_ln2); in xnn_f16_vsigmoid_ukernel__avx2_rr1_p2_div_x8()
Dvsigmoid-avx2-rr1-p2-rcp-x8.c30 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p2.minus_ln2); in xnn_f16_vsigmoid_ukernel__avx2_rr1_p2_rcp_x8()
Dvsigmoid-avx2-rr1-p2-div-x16.c30 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p2.minus_ln2); in xnn_f16_vsigmoid_ukernel__avx2_rr1_p2_div_x16()
/external/XNNPACK/src/f32-velu/gen/
Dvelu-avx512f-rr1-lut16-p3-perm-x16.c34 const __m512 vminus_ln2 = _mm512_set1_ps(params->avx512_rr1_lut16_p3.minus_ln2); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x16()
Dvelu-avx2-rr1-lut8-p4-perm-x8.c33 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut8_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x8()
Dvelu-avx2-rr1-p6-x8.c32 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p6.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_p6_x8()
Dvelu-avx512f-rr1-p6-x16.c34 const __m512 vminus_ln2 = _mm512_set1_ps(params->avx512_rr1_p6.minus_ln2); in xnn_f32_velu_ukernel__avx512f_rr1_p6_x16()
Dvelu-avx2-rr1-lut16-p3-gather-x8.c35 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut16_p3.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x8()
Dvelu-avx2-rr1-lut4-p4-perm-x8.c33 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_lut4_p4.minus_ln2); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8()
Dvelu-neonfma-rr1-p6-x4.c35 const float32x4_t vminus_ln2 = vld1q_dup_f32(&params->neonfma_rr1_p6.minus_ln2); in xnn_f32_velu_ukernel__neonfma_rr1_p6_x4()
Dvelu-neonfma-rr1-lut16-p3-x4.c38 const float32x4_t vminus_ln2 = vld1q_dup_f32(&params->neonfma_rr1_lut16_p3.minus_ln2); in xnn_f32_velu_ukernel__neonfma_rr1_lut16_p3_x4()
/external/XNNPACK/src/f32-raddstoreexpminusmax/gen/
Dneonfma-rr1-p5-x4.c31 const float32x4_t vminus_ln2 = vld1q_dup_f32(&params->neonfma_rr1_p5.minus_ln2); in xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_p5_x4()
Dneonfma-rr1-lut64-p2-x4.c34 const float32x4_t vminus_ln2 = vld1q_dup_f32(&params->neonfma_rr1_lut64_p2.minus_ln2); in xnn_f32_raddstoreexpminusmax_ukernel__neonfma_rr1_lut64_p2_x4()
/external/XNNPACK/src/f16-velu/gen/
Dvelu-neonfp16arith-rr1-p3-x8.c31 …t16x8_t vminus_ln2 = vreinterpretq_f16_u16(vld1q_dup_u16(&params->neonfp16arith_rr1_p3.minus_ln2)); in xnn_f16_velu_ukernel__neonfp16arith_rr1_p3_x8()
Dvelu-avx2-rr1-p3-x8.c31 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p3.minus_ln2); in xnn_f16_velu_ukernel__avx2_rr1_p3_x8()

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