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Searched refs:movmskps (Results 1 – 18 of 18) sorted by relevance

/external/llvm/test/CodeGen/X86/
Dmovmsk.ll58 ; CHECK-NEXT: movmskps %xmm0, %eax
80 ; CHECK-NEXT: movmskps %xmm0, %eax
98 ; FIXME: This should also use movmskps; we don't form the FGETSIGN node
122 ; CHECK-NEXT: movmskps %xmm0, %eax
Dfp-logic.ll249 ; by movmskps/movmskpd, but if we're not shifting it over, then
Dsse-intrinsics-x86.ll333 ; SSE-NEXT: movmskps %xmm0, %eax
Dsse-intrinsics-fast-isel.ll1223 ; X32-NEXT: movmskps %xmm0, %eax
1228 ; X64-NEXT: movmskps %xmm0, %eax
/external/llvm/test/MC/Disassembler/X86/
Dinvalid-VEX-vvvv.txt3 # This instruction would decode as movmskps if the vvvv field in the VEX prefix was all 1s.
/external/swiftshader/src/Reactor/
Dx86.hpp96 RValue<Int> movmskps(RValue<Float4> x);
DLLVMReactor.cpp2751 return x86::movmskps(As<Float4>(x)); in SignMask()
3121 return x86::movmskps(x); in SignMask()
3755 RValue<Int> movmskps(RValue<Float4> x) in movmskps() function
/external/libvpx/third_party/x86inc/
Dx86inc.asm1590 AVX_INSTR movmskps, sse, 1
/external/libaom/third_party/x86inc/
Dx86inc.asm1590 AVX_INSTR movmskps, sse, 1
/external/elfutils/libcpu/defs/
Di386673 00001111,01010000,11{reg}{xmmreg}:movmskps {xmmreg},{reg}
/external/elfutils/tests/
Dtestfile44.expect.bz21testfile44.o: elf32-elf_i386 2 3Disassembly of section .text: 4 5 0 ...
Dtestfile45.expect.bz21testfile45.o: elf64-elf_x86_64 2 3Disassembly of section .text: 4 5 0 ...
/external/llvm/test/MC/X86/
Dx86-32-coverage.s5885 movmskps %xmm5,%ecx
/external/mesa3d/src/mesa/x86/
Dassyntax.h1675 #define MOVMSKPS(a, b) movmskps P_ARG2(a, b)
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrSSE.td2161 defm VMOVMSKPS : sse12_extr_sign_mask<VR128, v4f32, "movmskps",
2165 defm VMOVMSKPSY : sse12_extr_sign_mask<VR256, v8f32, "movmskps",
2181 defm MOVMSKPS : sse12_extr_sign_mask<VR128, v4f32, "movmskps",
/external/llvm/lib/Target/X86/
DX86InstrSSE.td2720 defm VMOVMSKPS : sse12_extr_sign_mask<VR128, v4f32, "movmskps",
2724 defm VMOVMSKPSY : sse12_extr_sign_mask<VR256, v8f32, "movmskps",
2730 defm MOVMSKPS : sse12_extr_sign_mask<VR128, v4f32, "movmskps",
/external/capstone/arch/X86/
DX86MappingInsnOp.inc6072 { /* X86_MOVMSKPSrr, X86_INS_MOVMSKPS: movmskps $dst, $src */
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenAsmMatcher.inc7704 "movlpd\006movlps\010movmskpd\010movmskps\007movntdq\010movntdqa\006movn"
9248 …{ 4589 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MC…
23837 …{ 4589 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR…