/external/llvm/test/CodeGen/X86/ |
D | movmsk.ll | 58 ; CHECK-NEXT: movmskps %xmm0, %eax 80 ; CHECK-NEXT: movmskps %xmm0, %eax 98 ; FIXME: This should also use movmskps; we don't form the FGETSIGN node 122 ; CHECK-NEXT: movmskps %xmm0, %eax
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D | fp-logic.ll | 249 ; by movmskps/movmskpd, but if we're not shifting it over, then
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D | sse-intrinsics-x86.ll | 333 ; SSE-NEXT: movmskps %xmm0, %eax
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D | sse-intrinsics-fast-isel.ll | 1223 ; X32-NEXT: movmskps %xmm0, %eax 1228 ; X64-NEXT: movmskps %xmm0, %eax
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/external/llvm/test/MC/Disassembler/X86/ |
D | invalid-VEX-vvvv.txt | 3 # This instruction would decode as movmskps if the vvvv field in the VEX prefix was all 1s.
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/external/swiftshader/src/Reactor/ |
D | x86.hpp | 96 RValue<Int> movmskps(RValue<Float4> x);
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D | LLVMReactor.cpp | 2751 return x86::movmskps(As<Float4>(x)); in SignMask() 3121 return x86::movmskps(x); in SignMask() 3755 RValue<Int> movmskps(RValue<Float4> x) in movmskps() function
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/external/libvpx/third_party/x86inc/ |
D | x86inc.asm | 1590 AVX_INSTR movmskps, sse, 1
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/external/libaom/third_party/x86inc/ |
D | x86inc.asm | 1590 AVX_INSTR movmskps, sse, 1
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/external/elfutils/libcpu/defs/ |
D | i386 | 673 00001111,01010000,11{reg}{xmmreg}:movmskps {xmmreg},{reg}
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/external/elfutils/tests/ |
D | testfile44.expect.bz2 | 1testfile44.o: elf32-elf_i386
2
3Disassembly of section .text:
4
5 0 ... |
D | testfile45.expect.bz2 | 1testfile45.o: elf64-elf_x86_64
2
3Disassembly of section .text:
4
5 0 ... |
/external/llvm/test/MC/X86/ |
D | x86-32-coverage.s | 5885 movmskps %xmm5,%ecx
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/external/mesa3d/src/mesa/x86/ |
D | assyntax.h | 1675 #define MOVMSKPS(a, b) movmskps P_ARG2(a, b)
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86InstrSSE.td | 2161 defm VMOVMSKPS : sse12_extr_sign_mask<VR128, v4f32, "movmskps", 2165 defm VMOVMSKPSY : sse12_extr_sign_mask<VR256, v8f32, "movmskps", 2181 defm MOVMSKPS : sse12_extr_sign_mask<VR128, v4f32, "movmskps",
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/external/llvm/lib/Target/X86/ |
D | X86InstrSSE.td | 2720 defm VMOVMSKPS : sse12_extr_sign_mask<VR128, v4f32, "movmskps", 2724 defm VMOVMSKPSY : sse12_extr_sign_mask<VR256, v8f32, "movmskps", 2730 defm MOVMSKPS : sse12_extr_sign_mask<VR128, v4f32, "movmskps",
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/external/capstone/arch/X86/ |
D | X86MappingInsnOp.inc | 6072 { /* X86_MOVMSKPSrr, X86_INS_MOVMSKPS: movmskps $dst, $src */
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
D | X86GenAsmMatcher.inc | 7704 "movlpd\006movlps\010movmskpd\010movmskps\007movntdq\010movntdqa\006movn" 9248 …{ 4589 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MC… 23837 …{ 4589 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR…
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