/external/mesa3d/src/panfrost/util/ |
D | pan_lower_writeout.c | 70 … if (z_var && nir_intrinsic_base(intr) == z_var->data.driver_location) { in pan_nir_lower_zs_store() 75 … if (s_var && nir_intrinsic_base(intr) == s_var->data.driver_location) { in pan_nir_lower_zs_store() 95 …e *var = nir_find_variable_with_driver_location(nir, nir_var_shader_out, nir_intrinsic_base(intr)); in pan_nir_lower_zs_store() 119 nir_intrinsic_set_base(combined_store, nir_intrinsic_base(intr)); in pan_nir_lower_zs_store() 173 base = nir_intrinsic_base(z_store); in pan_nir_lower_zs_store() 175 base = nir_intrinsic_base(s_store); in pan_nir_lower_zs_store() 236 …e *var = nir_find_variable_with_driver_location(nir, nir_var_shader_out, nir_intrinsic_base(intr)); in pan_nir_reorder_writeout()
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/external/mesa3d/src/gallium/drivers/vc4/ |
D | vc4_nir_lower_io.c | 177 int attr = nir_intrinsic_base(intr); in vc4_nir_lower_vertex_attr() 196 nir_intrinsic_set_base(intr_comp, nir_intrinsic_base(intr)); in vc4_nir_lower_vertex_attr() 235 if (nir_intrinsic_base(intr) >= VC4_NIR_TLB_COLOR_READ_INPUT && in vc4_nir_lower_fs_input() 236 nir_intrinsic_base(intr) < (VC4_NIR_TLB_COLOR_READ_INPUT + in vc4_nir_lower_fs_input() 244 nir_intrinsic_base(intr)); in vc4_nir_lower_fs_input() 291 nir_intrinsic_base(intr)); in vc4_nir_lower_output() 322 nir_intrinsic_base(intr) * 16 + in vc4_nir_lower_uniform()
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/external/mesa3d/src/compiler/nir/ |
D | nir_lower_uniforms_to_ubo.c | 62 nir_iadd(b, nir_imm_int(b, multiplier * nir_intrinsic_base(instr)), in lower_instr() 84 nir_intrinsic_base(instr) * multiplier) % in lower_instr() 96 nir_intrinsic_set_range_base(load, nir_intrinsic_base(instr) * multiplier); in lower_instr()
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D | nir_lower_interpolation.c | 60 if (nir_intrinsic_base(intr) == VARYING_SLOT_POS) in nir_lower_interpolation_block() 111 nir_intrinsic_set_base(load_iid, nir_intrinsic_base(intr)); in nir_lower_interpolation_block()
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D | nir_lower_fb_read.c | 104 if (nir_intrinsic_base(intr) != 0 || in nir_lower_fb_read()
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D | nir_lower_clamp_color_outputs.c | 73 if (nir_intrinsic_base(intr) == drvloc) { in lower_intrinsic()
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D | nir_lower_alpha_test.c | 67 if (nir_intrinsic_base(intr) == drvloc) { in nir_lower_alpha_test()
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D | nir_lower_wrmasks.c | 149 nir_intrinsic_base(intr) + offset_adj); in split_wrmask()
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D | nir_lower_io_to_scalar.c | 50 nir_intrinsic_set_base(chan_intr, nir_intrinsic_base(intr)); in lower_load_input_to_scalar() 83 nir_intrinsic_set_base(chan_intr, nir_intrinsic_base(intr)); in lower_store_output_to_scalar()
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D | nir_lower_atomics_to_ssbo.c | 89 nir_ssa_def *buffer = nir_imm_int(b, ssbo_offset + nir_intrinsic_base(instr)); in lower_instr()
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D | nir_lower_two_sided_color.c | 157 if (nir_intrinsic_base(intr) == drvloc) { in nir_lower_two_sided_color_block()
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/external/mesa3d/src/gallium/drivers/r600/sfn/ |
D | sfn_emitssboinstruction.cpp | 122 int base = remap_atomic_base(nir_intrinsic_base(instr)); in emit_atomic() 151 auto ir = new GDSInstr(op, dest, uav_id, remap_atomic_base(nir_intrinsic_base(instr))); in emit_unary_atomic() 242 remap_atomic_base(nir_intrinsic_base(instr))); in emit_atomic_add() 262 remap_atomic_base(nir_intrinsic_base(instr))); in emit_atomic_inc() 274 remap_atomic_base(nir_intrinsic_base(instr))); in emit_atomic_pre_dec()
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D | sfn_nir_lower_tess_io.cpp | 96 …set = nir_imm_int(b, get_tcs_varying_offset(b->shader, nir_var_shader_in, nir_intrinsic_base(op))); in emil_lsd_in_addr() 115 int offset = get_tcs_varying_offset(b->shader, mode, nir_intrinsic_base(op)); in emil_lsd_out_addr() 190 int offset = get_tcs_varying_offset(b->shader, mode, nir_intrinsic_base(op)); in emil_tcs_io_offset()
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/external/mesa3d/src/intel/vulkan/ |
D | anv_nir_compute_push_layout.c | 60 unsigned base = nir_intrinsic_base(intrin); in anv_nir_compute_push_layout() 141 nir_intrinsic_base(intrin) - in anv_nir_compute_push_layout()
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/external/mesa3d/src/gallium/drivers/lima/ir/ |
D | lima_nir_lower_uniform_to_scalar.c | 42 nir_intrinsic_set_base(chan_intr, nir_intrinsic_base(intr) * 4 + i); in lower_load_uniform_to_scalar()
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D | lima_nir_split_load_input.c | 79 nir_intrinsic_set_base(new_intrin, nir_intrinsic_base(intrin)); in lima_nir_split_load_input_block()
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/external/mesa3d/src/gallium/drivers/lima/ir/gp/ |
D | nir.c | 262 nir_intrinsic_base(instr), in gpir_emit_intrinsic() 266 int offset = nir_intrinsic_base(instr); in gpir_emit_intrinsic() 284 store->index = nir_intrinsic_base(instr); in gpir_emit_intrinsic()
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/external/mesa3d/src/broadcom/compiler/ |
D | v3d_nir_lower_line_smooth.c | 74 nir_intrinsic_base(intr) != 0 || in lower_line_smooth_func()
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D | nir_to_vir.c | 262 const_offset += nir_intrinsic_base(instr); in ntq_emit_tmu_general() 288 const_offset += nir_intrinsic_base(instr); in ntq_emit_tmu_general() 1921 int sample_index = nir_intrinsic_base(instr) ; in vir_emit_tlb_color_read() 2050 int offset = (nir_intrinsic_base(instr) + in ntq_emit_load_uniform() 2072 nir_intrinsic_base(instr) + nir_src_as_uint(instr->src[0]); in ntq_emit_load_input() 2122 unsigned sample_idx = nir_intrinsic_base(instr); in ntq_emit_per_sample_color_write() 2136 unsigned offset = (nir_intrinsic_base(instr) + in ntq_emit_color_write() 2152 uint32_t base_offset = nir_intrinsic_base(instr); in emit_store_output_gs() 2201 uint32_t base = nir_intrinsic_base(instr); in ntq_emit_store_output() 2630 uint32_t row_idx = nir_intrinsic_base(instr) * 4 + in ntq_emit_intrinsic() [all …]
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/external/mesa3d/src/intel/compiler/ |
D | brw_nir_lower_alpha_to_coverage.c | 114 const unsigned driver_location = nir_intrinsic_base(intrin) + in brw_nir_lower_alpha_to_coverage()
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D | brw_nir.c | 35 const int location = nir_intrinsic_base(intr); in remap_tess_levels() 272 int attr = nir_intrinsic_base(intrin); in brw_nir_lower_vs_inputs() 320 int varying = nir_intrinsic_base(intrin); in brw_nir_lower_vue_inputs()
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/external/mesa3d/src/gallium/drivers/etnaviv/ |
D | etnaviv_compiler_nir.c | 560 .reg = nir_intrinsic_base(intr), in emit_intrinsic() 901 indirect_max = nir_intrinsic_base(intr) + nir_intrinsic_range(intr); in emit_shader() 905 unsigned base = nir_intrinsic_base(intr); in emit_shader() 914 if (nir_intrinsic_base(intr) < 0) in emit_shader() 915 value[i] = TEXSCALE(~nir_intrinsic_base(intr), i); in emit_shader()
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D | etnaviv_compiler_nir_ra.c | 203 reg = nir_intrinsic_base(intr) * NUM_REG_TYPES + (unsigned[]) { in etna_ra_assign()
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/external/mesa3d/src/freedreno/ir3/ |
D | ir3_nir_lower_tex_prefetch.c | 93 unsigned base = nir_src_as_uint(input->src[1]) + nir_intrinsic_base(input); in coord_offset()
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/external/mesa3d/src/gallium/auxiliary/nir/ |
D | nir_to_tgsi.c | 991 nir_intrinsic_base(instr)), in ntt_emit_load_uniform() 1309 unsigned base = nir_intrinsic_base(instr); in ntt_emit_load_input() 1372 if (c->centroid_inputs & (1 << nir_intrinsic_base(instr))) { in ntt_emit_load_input() 1410 uint32_t base = nir_intrinsic_base(instr); in ntt_emit_store_output() 2362 nir_intrinsic_set_base(second, nir_intrinsic_base(second) + 1); in nir_to_tgsi_lower_64bit_intrinsic() 2377 nir_intrinsic_set_base(second, nir_intrinsic_base(second) + 1); in nir_to_tgsi_lower_64bit_intrinsic()
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