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Searched refs:nv50_ir (Results 1 – 25 of 50) sorted by relevance

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/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_driver.h235 namespace nv50_ir
241 gk110_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
242 const nv50_ir::FixupData& data);
244 gm107_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
245 const nv50_ir::FixupData& data);
247 nv50_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
248 const nv50_ir::FixupData& data);
250 nvc0_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
251 const nv50_ir::FixupData& data);
253 gv100_interpApply(const nv50_ir::FixupEntry *entry, uint32_t *code,
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Dnv50_ir_serialize.cpp78 nv50_ir::RelocInfo *reloc = (nv50_ir::RelocInfo *)info_out->bin.relocData; in nv50_ir_prog_info_out_serialize()
89 nv50_ir::FixupInfo *fixup = (nv50_ir::FixupInfo *)info_out->bin.fixupData; in nv50_ir_prog_info_out_serialize()
98 if (fixup->entry[i].apply == nv50_ir::nv50_interpApply) in nv50_ir_prog_info_out_serialize()
100 else if (fixup->entry[i].apply == nv50_ir::nvc0_interpApply) in nv50_ir_prog_info_out_serialize()
102 else if (fixup->entry[i].apply == nv50_ir::gk110_interpApply) in nv50_ir_prog_info_out_serialize()
104 else if (fixup->entry[i].apply == nv50_ir::gm107_interpApply) in nv50_ir_prog_info_out_serialize()
106 else if (fixup->entry[i].apply == nv50_ir::gv100_interpApply) in nv50_ir_prog_info_out_serialize()
108 else if (fixup->entry[i].apply == nv50_ir::nvc0_selpFlip) in nv50_ir_prog_info_out_serialize()
110 else if (fixup->entry[i].apply == nv50_ir::gk110_selpFlip) in nv50_ir_prog_info_out_serialize()
112 else if (fixup->entry[i].apply == nv50_ir::gm107_selpFlip) in nv50_ir_prog_info_out_serialize()
[all …]
Dnv50_ir_from_tgsi.cpp38 static nv50_ir::operation translateOpcode(uint opcode);
39 static nv50_ir::DataFile translateFile(uint file);
40 static nv50_ir::TexTarget translateTexture(uint texTarg);
41 static nv50_ir::SVSemantic translateSysVal(uint sysval);
42 static nv50_ir::CacheMode translateCacheMode(uint qualifier);
107 nv50_ir::Modifier getMod(int chan) const;
215 inline nv50_ir::operation getOP() const { in getOP()
218 nv50_ir::DataType inferSrcType() const;
219 nv50_ir::DataType inferDstType() const;
221 nv50_ir::CondCode getSetCond() const;
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Dnv50_ir_target.cpp26 namespace nv50_ir { namespace
485 nv50_ir::RelocInfo *info = reinterpret_cast<nv50_ir::RelocInfo *>(relocData); in nv50_ir_relocate_code()
500 nv50_ir::FixupInfo *info = reinterpret_cast<nv50_ir::FixupInfo *>( in nv50_ir_apply_fixups()
506 nv50_ir::FixupData data(force_persample_interp, flatshade, alphatest); in nv50_ir_apply_fixups()
515 nv50_ir::Target *targ = nv50_ir::Target::create(chipset); in nv50_ir_get_target_library()
517 nv50_ir::Target::destroy(targ); in nv50_ir_get_target_library()
Dnv50_ir.cpp32 namespace nv50_ir { namespace
1030 case PIPE_FORMAT_ ## a: return &formatTable[nv50_ir::FMT_ ## b] in translateImgFormat()
1083 return &formatTable[nv50_ir::FMT_NONE]; in translateImgFormat()
1277 nv50_ir::Program::Type type; in nv50_ir_generate_code()
1282 case PIPE_SHADER_##a: type = nv50_ir::Program::TYPE_##b; break in nv50_ir_generate_code()
1297 nv50_ir::Target *targ = nv50_ir::Target::create(info->target); in nv50_ir_generate_code()
1301 nv50_ir::Program *prog = new nv50_ir::Program(type, targ); in nv50_ir_generate_code()
1303 nv50_ir::Target::destroy(targ); in nv50_ir_generate_code()
1328 prog->getTarget()->runLegalizePass(prog, nv50_ir::CG_STAGE_PRE_SSA); in nv50_ir_generate_code()
1336 prog->getTarget()->runLegalizePass(prog, nv50_ir::CG_STAGE_SSA); in nv50_ir_generate_code()
[all …]
Dunordered_set.h10 namespace nv50_ir {
Dnv50_ir_lowering_helper.h31 namespace nv50_ir {
Dnv50_ir_lowering_gm107.h3 namespace nv50_ir {
Dnv50_ir_print.cpp29 namespace nv50_ir { namespace
889 nv50_ir::RelocInfo *reloc = (nv50_ir::RelocInfo *)info_out->bin.relocData; in nv50_ir_prog_info_out_print()
911 nv50_ir::FixupInfo *fixup = (nv50_ir::FixupInfo *)info_out->bin.fixupData; in nv50_ir_prog_info_out_print()
Dnv50_ir_from_common.h26 namespace nv50_ir {
Dnv50_ir_target_gv100.h26 namespace nv50_ir {
Dnv50_ir_target_gm107.h3 namespace nv50_ir {
Dnv50_ir_lowering_gv100.h26 namespace nv50_ir {
Dnv50_ir_target_nv50.h25 namespace nv50_ir {
Dnv50_ir_target_nvc0.h25 namespace nv50_ir {
Dnv50_ir_from_common.cpp25 namespace nv50_ir { namespace
Dnv50_ir_target_gv100.cpp26 namespace nv50_ir { namespace
432 const struct opInfo *info = nv50_ir::getOpInfo(i); in isModSupported()
477 const struct opInfo *info = nv50_ir::getOpInfo(i); in insnCanLoad()
Dnv50_ir_graph.h29 namespace nv50_ir {
Dnv50_ir_lowering_nvc0.h55 namespace nv50_ir {
Dnv50_ir_sched_gm107.h3 namespace nv50_ir {
Dnv50_ir_target_gm107.cpp27 namespace nv50_ir { namespace
Dnv50_ir_target.h28 namespace nv50_ir {
Dnv50_ir_util.h85 namespace nv50_ir {
383 class Iterator : public nv50_ir::Iterator
/external/mesa3d/src/gallium/drivers/nouveau/
DMakefile.sources111 codegen/nv50_ir.cpp \
123 codegen/nv50_ir.h \
Dmeson.build125 'codegen/nv50_ir.cpp',
137 'codegen/nv50_ir.h',

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