| /external/mesa3d/src/gallium/frontends/va/ |
| D | picture_hevc.c | 65 context->desc.h265.pps->sps->pcm_enabled_flag = hevc->pic_fields.bits.pcm_enabled_flag; in vlVaHandlePictureParameterBufferHEVC()
66 if (hevc->pic_fields.bits.pcm_enabled_flag == 1) { in vlVaHandlePictureParameterBufferHEVC()
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| D | picture_hevc_enc.c | 151 context->desc.h265enc.seq.pcm_enabled_flag = h265->seq_fields.bits.pcm_enabled_flag; in vlVaHandleVAEncSequenceParameterBufferTypeHEVC()
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| /external/virglrenderer/src/ |
| D | virgl_video_hw.h | 295 uint8_t pcm_enabled_flag; member
418 uint8_t pcm_enabled_flag; member
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| D | virgl_video.c | 1583 ITEM_SET(&vapp->pic_fields.bits, &desc->pps.sps, pcm_enabled_flag); in h265_fill_picture_param()
1606 if (desc->pps.sps.pcm_enabled_flag) in h265_fill_picture_param()
1615 if (desc->pps.sps.pcm_enabled_flag) { in h265_fill_picture_param()
1623 if (desc->pps.sps.pcm_enabled_flag) { in h265_fill_picture_param()
1757 ITEM_SET(¶m->seq_fields.bits, &desc->seq, pcm_enabled_flag); in h265_fill_enc_seq_param()
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_video_state.h | 454 bool pcm_enabled_flag; member
551 uint8_t pcm_enabled_flag; member
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | radeon_uvd_enc.h | 366 bool pcm_enabled_flag; member
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| D | radeon_vcn_enc.c | 149 enc->enc_pic.pcm_enabled_flag = pic->seq.pcm_enabled_flag; in radeon_vcn_enc_get_param()
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| D | radeon_uvd_enc.c | 100 enc->enc_pic.pcm_enabled_flag = 0; /*HW not support PCM */ in radeon_uvd_enc_get_param()
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| D | radeon_vcn_enc.h | 444 bool pcm_enabled_flag; member
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| D | radeon_vcn_enc_2_0.c | 175 radeon_enc_code_fixed_bits(enc, enc->enc_pic.pcm_enabled_flag, 1); in radeon_enc_nalu_sps_hevc()
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| D | radeon_uvd_enc_1_1.c | 459 radeon_uvd_enc_code_fixed_bits(enc, enc->enc_pic.pcm_enabled_flag, 1); in radeon_uvd_enc_nalu_sps_hevc()
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| D | radeon_vcn_enc_1_2.c | 429 radeon_enc_code_fixed_bits(enc, enc->enc_pic.pcm_enabled_flag, 1); in radeon_enc_nalu_sps_hevc()
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| D | radeon_uvd.c | 598 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3; in get_h265_msg()
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| D | radeon_vcn_dec.c | 187 result.sps_info_flags |= pic->pps->sps->pcm_enabled_flag << 3; in get_h265_msg()
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| /external/gfxstream-protocols/registry/vulkan/include/vk_video/ |
| D | vulkan_video_codec_h265std.h | 218 uint32_t pcm_enabled_flag : 1; member
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| /external/mesa3d/src/gallium/frontends/vdpau/ |
| D | decode.c | 445 picture->pps->sps->pcm_enabled_flag = picture_info->pcm_enabled_flag; in vlVdpDecoderRenderH265()
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| /external/vulkan-headers/include/vk_video/ |
| D | vulkan_video_codec_h265std.h | 272 uint32_t pcm_enabled_flag : 1; member
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| /external/swiftshader/include/vk_video/ |
| D | vulkan_video_codec_h265std.h | 272 uint32_t pcm_enabled_flag : 1; member
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| /external/angle/third_party/vulkan-deps/vulkan-headers/src/include/vk_video/ |
| D | vulkan_video_codec_h265std.h | 274 uint32_t pcm_enabled_flag : 1; member
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| /external/gfxstream-protocols/include/vulkan/include/vk_video/ |
| D | vulkan_video_codec_h265std.h | 272 uint32_t pcm_enabled_flag : 1; member
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| /external/mesa3d/src/gallium/frontends/omx/bellagio/ |
| D | vid_dec_h265.c | 484 sps->pcm_enabled_flag = vl_rbsp_u(rbsp, 1); in seq_parameter_set()
485 if (sps->pcm_enabled_flag) { in seq_parameter_set()
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| /external/angle/third_party/vulkan-deps/vulkan-headers/src/include/vulkan/ |
| D | vulkan_video.hpp | 1722 …_flag == rhs.sample_adaptive_offset_enabled_flag ) && ( pcm_enabled_flag == rhs.pcm_enabled_flag )… in operator ==()
1756 uint32_t pcm_enabled_flag : 1; member
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| /external/rust/crates/ash/src/vk/ |
| D | native.rs | 4261 pub fn pcm_enabled_flag(&self) -> u32 { in pcm_enabled_flag() method
4499 pcm_enabled_flag: u32, in new_bitfield_1()
4552 let pcm_enabled_flag: u32 = unsafe { ::std::mem::transmute(pcm_enabled_flag) }; localVariable
4553 pcm_enabled_flag as u64
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| /external/deqp/external/vulkancts/framework/vulkan/generated/vulkan/ |
| D | vkStructTypes.inl | 8695 uint32_t pcm_enabled_flag:1; member
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| D | vkVulkan_c.inl | 750 deUint32 pcm_enabled_flag : 1; member
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