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Searched refs:radv_nir_get_max_workgroup_size (Results 1 – 3 of 3) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_private.h2478 unsigned radv_nir_get_max_workgroup_size(enum chip_class chip_class,
Dradv_nir_to_llvm.c3742 radv_nir_get_max_workgroup_size(enum chip_class chip_class, in radv_nir_get_max_workgroup_size() function
3836 radv_nir_get_max_workgroup_size(args->options->chip_class, in ac_translate_nir_to_llvm()
/external/mesa3d/docs/relnotes/
D20.0.0.rst2762 - radv: fix radv_nir_get_max_workgroup_size when nir=NULL