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Searched refs:register_write_out (Results 1 – 2 of 2) sorted by relevance

/external/igt-gpu-tools/tools/
Daubdump.c372 register_write_out(uint32_t addr, uint32_t value) in register_write_out() function
594 register_write_out(HWS_PGA_RCSUNIT, RENDER_CONTEXT_ADDR); in gen10_write_header()
595 register_write_out(HWS_PGA_VCSUNIT0, VIDEO_CONTEXT_ADDR); in gen10_write_header()
596 register_write_out(HWS_PGA_BCSUNIT, BLITTER_CONTEXT_ADDR); in gen10_write_header()
598 register_write_out(GFX_MODE_RCSUNIT, 0x80008000 /* execlist enable */); in gen10_write_header()
599 register_write_out(GFX_MODE_VCSUNIT0, 0x80008000 /* execlist enable */); in gen10_write_header()
600 register_write_out(GFX_MODE_BCSUNIT, 0x80008000 /* execlist enable */); in gen10_write_header()
768 register_write_out(elsq_reg, descriptor & 0xFFFFFFFF); in aub_dump_execlist()
769 register_write_out(elsq_reg + sizeof(uint32_t), descriptor >> 32); in aub_dump_execlist()
770 register_write_out(control_reg, 1); in aub_dump_execlist()
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/external/mesa3d/src/intel/tools/
Daub_write.c217 register_write_out(struct aub_file *aub, uint32_t addr, uint32_t value) in register_write_out() function
514 register_write_out(aub, reg, aub->engine_setup[engine_class].hwsp_addr); in write_hwsp()
574 register_write_out(aub, GFX_MODE_RCSUNIT, 0x80008000 /* execlist enable */); in write_execlists_default_setup()
575 register_write_out(aub, GFX_MODE_VCSUNIT0, 0x80008000 /* execlist enable */); in write_execlists_default_setup()
576 register_write_out(aub, GFX_MODE_BCSUNIT, 0x80008000 /* execlist enable */); in write_execlists_default_setup()
747 register_write_out(aub, cs->elsq_reg, descriptor & 0xFFFFFFFF); in aub_dump_execlist()
748 register_write_out(aub, cs->elsq_reg + sizeof(uint32_t), descriptor >> 32); in aub_dump_execlist()
749 register_write_out(aub, cs->control_reg, 1); in aub_dump_execlist()
751 register_write_out(aub, cs->elsp_reg, 0); in aub_dump_execlist()
752 register_write_out(aub, cs->elsp_reg, 0); in aub_dump_execlist()
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