/external/libaom/aom_dsp/x86/ |
D | fwd_txfm_sse2.h | 68 int res0, res1; in check_epi16_overflow_x8() local 69 res0 = check_epi16_overflow_x4(preg0, preg1, preg2, preg3); in check_epi16_overflow_x8() 71 return res0 + res1; in check_epi16_overflow_x8() 79 int res0, res1; in check_epi16_overflow_x12() local 80 res0 = check_epi16_overflow_x4(preg0, preg1, preg2, preg3); in check_epi16_overflow_x12() 82 if (!res0) res0 = check_epi16_overflow_x4(preg8, preg9, preg10, preg11); in check_epi16_overflow_x12() 83 return res0 + res1; in check_epi16_overflow_x12() 93 int res0, res1; in check_epi16_overflow_x16() local 94 res0 = check_epi16_overflow_x4(preg0, preg1, preg2, preg3); in check_epi16_overflow_x16() 96 if (!res0) { in check_epi16_overflow_x16() [all …]
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D | masked_sad4d_ssse3.c | 49 __m128i res0 = _mm_setzero_si128(); in masked_sadx4d_ssse3() local 81 res0 = _mm_add_epi32(_mm_unpacklo_epi32(res0, res1), in masked_sadx4d_ssse3() 82 _mm_unpackhi_epi32(res0, res1)); in masked_sadx4d_ssse3() 86 res0 = _mm_unpacklo_epi64(res0, res2); in masked_sadx4d_ssse3() 87 _mm_storeu_si128((__m128i *)sad_array, res0); in masked_sadx4d_ssse3() 116 __m128i res0 = _mm_setzero_si128(); in aom_masked_sad8xhx4d_ssse3() local 148 res0 = _mm_add_epi32(_mm_unpacklo_epi32(res0, res1), in aom_masked_sad8xhx4d_ssse3() 149 _mm_unpackhi_epi32(res0, res1)); in aom_masked_sad8xhx4d_ssse3() 152 res0 = _mm_unpacklo_epi64(res0, res2); in aom_masked_sad8xhx4d_ssse3() 153 _mm_storeu_si128((__m128i *)sad_array, res0); in aom_masked_sad8xhx4d_ssse3() [all …]
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/external/libvpx/vp8/common/mips/msa/ |
D | idct_msa.c | 91 v4i32 res0, res1, res2, res3; in idct4x4_addblk_msa() local 104 ILVR_B4_SW(zero, pred0, zero, pred1, zero, pred2, zero, pred3, res0, res1, in idct4x4_addblk_msa() 106 ILVR_H4_SW(zero, res0, zero, res1, zero, res2, zero, res3, res0, res1, res2, in idct4x4_addblk_msa() 108 ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3); in idct4x4_addblk_msa() 109 res0 = CLIP_SW_0_255(res0); in idct4x4_addblk_msa() 113 PCKEV_B2_SW(res0, res1, res2, res3, vt0, vt1); in idct4x4_addblk_msa() 114 res0 = (v4i32)__msa_pckev_b((v16i8)vt0, (v16i8)vt1); in idct4x4_addblk_msa() 115 ST4x4_UB(res0, res0, 3, 2, 1, 0, dest, dest_stride); in idct4x4_addblk_msa() 121 v8i16 vec, res0, res1, res2, res3, dst0, dst1; in idct4x4_addconst_msa() local 128 ILVR_B4_SH(zero, pred0, zero, pred1, zero, pred2, zero, pred3, res0, res1, in idct4x4_addconst_msa() [all …]
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/external/llvm/test/CodeGen/X86/ |
D | vector-shuffle-combining-avx512bw.ll | 24 …%res0 = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %x0, <8 x i64> <i64 7,… 25 …permvar.df.512(<8 x double> %res0, <8 x i64> <i64 7, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, … 38 …%res0 = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %x0, <8 x i64> <i64 7,… 39 …permvar.df.512(<8 x double> %res0, <8 x i64> <i64 7, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, … 47 …%res0 = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> <i64 7, i64 6… 48 …ask.permvar.di.512(<8 x i64> %res0, <8 x i64> <i64 7, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1,… 61 …%res0 = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> <i64 7, i64 6… 62 …ask.permvar.di.512(<8 x i64> %res0, <8 x i64> <i64 7, i64 14, i64 5, i64 12, i64 3, i64 10, i64 1,… 70 …%res0 = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> <i64 7, i64 6, i64 5,… 71 …i64 14, i64 5, i64 12, i64 3, i64 10, i64 1, i64 8>, <8 x double> %res0, <8 x double> %res0, i8 -1) [all …]
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D | vector-shuffle-combining-xop.ll | 18 …%res0 = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a1, <2 x double> %a0, <2 x i64> <… 19 …%res1 = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %res0, <2 x double> undef, <2 x i6… 28 …%res0 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a1, <4 x double> %a0, <4 x i6… 29 …%res1 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %res0, <4 x double> undef, <4 … 38 …%res0 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %a1, <4 x float> %a0, <4 x i32> <i32… 39 …%res1 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %res0, <4 x float> undef, <4 x i32> … 48 …%res0 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a1, <8 x float> %a0, <8 x i32> … 49 …%res1 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %res0, <8 x float> undef, <8 x i… 58 …%res0 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a1, <8 x float> %a0, <8 x i32> … 59 ret <8 x float> %res0 [all …]
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D | avx512bwvl-intrinsics-fast-isel.ll | 18 %res0 = shufflevector <16 x i8> %arg0, <16 x i8> undef, <16 x i32> zeroinitializer 19 %res1 = bitcast <16 x i8> %res0 to <2 x i64> 39 %res0 = shufflevector <16 x i8> %arg2, <16 x i8> undef, <16 x i32> zeroinitializer 40 %res1 = select <16 x i1> %arg1, <16 x i8> %res0, <16 x i8> %arg0 60 %res0 = shufflevector <16 x i8> %arg1, <16 x i8> undef, <16 x i32> zeroinitializer 61 %res1 = select <16 x i1> %arg0, <16 x i8> %res0, <16 x i8> zeroinitializer 77 %res0 = shufflevector <16 x i8> %arg0, <16 x i8> undef, <32 x i32> zeroinitializer 78 %res1 = bitcast <32 x i8> %res0 to <4 x i64> 98 %res0 = shufflevector <16 x i8> %arg2, <16 x i8> undef, <32 x i32> zeroinitializer 99 %res1 = select <32 x i1> %arg1, <32 x i8> %res0, <32 x i8> %arg0 [all …]
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D | avx512-intrinsics-fast-isel.ll | 18 %res0 = shufflevector <4 x i32> %arg0, <4 x i32> undef, <16 x i32> zeroinitializer 19 %res1 = bitcast <16 x i32> %res0 to <8 x i64> 39 %res0 = shufflevector <4 x i32> %arg2, <4 x i32> undef, <16 x i32> zeroinitializer 40 %res1 = select <16 x i1> %arg1, <16 x i32> %res0, <16 x i32> %arg0 60 %res0 = shufflevector <4 x i32> %arg1, <4 x i32> undef, <16 x i32> zeroinitializer 61 %res1 = select <16 x i1> %arg0, <16 x i32> %res0, <16 x i32> zeroinitializer 94 %res0 = shufflevector <2 x i64> %a2, <2 x i64> undef, <8 x i32> zeroinitializer 95 %res1 = select <8 x i1> %arg1, <8 x i64> %res0, <8 x i64> %a0 113 %res0 = shufflevector <2 x i64> %a1, <2 x i64> undef, <8 x i32> zeroinitializer 114 %res1 = select <8 x i1> %arg0, <8 x i64> %res0, <8 x i64> zeroinitializer [all …]
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D | avx512vl-intrinsics-fast-isel.ll | 18 %res0 = shufflevector <4 x i32> %arg0, <4 x i32> undef, <4 x i32> zeroinitializer 19 %res1 = bitcast <4 x i32> %res0 to <2 x i64> 50 %res0 = shufflevector <4 x i32> %arg2, <4 x i32> undef, <4 x i32> zeroinitializer 51 %res1 = select <4 x i1> %arg1, <4 x i32> %res0, <4 x i32> %arg0 82 %res0 = shufflevector <4 x i32> %arg1, <4 x i32> undef, <4 x i32> zeroinitializer 83 %res1 = select <4 x i1> %arg0, <4 x i32> %res0, <4 x i32> zeroinitializer 99 %res0 = shufflevector <4 x i32> %arg0, <4 x i32> undef, <8 x i32> zeroinitializer 100 %res1 = bitcast <8 x i32> %res0 to <4 x i64> 120 %res0 = shufflevector <4 x i32> %arg2, <4 x i32> undef, <8 x i32> zeroinitializer 121 %res1 = select <8 x i1> %arg1, <8 x i32> %res0, <8 x i32> %arg0 [all …]
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D | merge-consecutive-loads-128.ll | 31 %res0 = insertelement <2 x double> undef, double %val0, i32 0 32 %res1 = insertelement <2 x double> %res0, double %val1, i32 1 56 %res0 = insertelement <2 x i64> undef, i64 %val0, i32 0 57 %res1 = insertelement <2 x i64> %res0, i64 %val1, i32 1 85 %res0 = insertelement <4 x float> undef, float %val0, i32 0 86 %res1 = insertelement <4 x float> %res0, float %val1, i32 1 110 %res0 = insertelement <4 x float> undef, float %val0, i32 0 111 %res1 = insertelement <4 x float> %res0, float 0.0, i32 1 135 %res0 = insertelement <4 x float> undef, float %val0, i32 0 136 %res1 = insertelement <4 x float> %res0, float %val1, i32 1 [all …]
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D | merge-consecutive-loads-512.ll | 100 %res0 = insertelement <8 x double> undef, double %val0, i32 0 101 %res1 = insertelement <8 x double> %res0, double %val1, i32 1 129 %res0 = insertelement <8 x double> undef, double %val0, i32 0 130 %res1 = insertelement <8 x double> %res0, double %val1, i32 1 163 %res0 = insertelement <8 x double> undef, double %val0, i32 0 164 %res2 = insertelement <8 x double> %res0, double %val2, i32 2 215 %res0 = insertelement <8 x i64> undef, i64 %val0, i32 0 216 %res1 = insertelement <8 x i64> %res0, i64 %val1, i32 1 250 %res0 = insertelement <8 x i64> undef, i64 %val0, i32 0 251 %res2 = insertelement <8 x i64> %res0, i64 %val2, i32 2 [all …]
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D | merge-consecutive-loads-256.ll | 68 %res0 = insertelement <4 x double> undef, double %val0, i32 0 69 %res1 = insertelement <4 x double> %res0, double %val1, i32 1 88 %res0 = insertelement <4 x double> undef, double %val0, i32 0 89 %res1 = insertelement <4 x double> %res0, double 0.0, i32 1 108 %res0 = insertelement <4 x double> undef, double %val0, i32 0 109 %res1 = insertelement <4 x double> %res0, double %val1, i32 1 132 %res0 = insertelement <4 x double> zeroinitializer, double %val0, i32 0 133 %res1 = insertelement <4 x double> %res0, double %val1, i32 1 156 %res0 = insertelement <4 x double> undef, double %val0, i32 0 157 %res1 = insertelement <4 x double> %res0, double %val1, i32 1 [all …]
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D | avx512bw-intrinsics-fast-isel.ll | 18 %res0 = shufflevector <16 x i8> %arg0, <16 x i8> undef, <64 x i32> zeroinitializer 19 %res1 = bitcast <64 x i8> %res0 to <8 x i64> 40 %res0 = shufflevector <16 x i8> %arg2, <16 x i8> undef, <64 x i32> zeroinitializer 41 %res1 = select <64 x i1> %arg1, <64 x i8> %res0, <64 x i8> %arg0 62 %res0 = shufflevector <16 x i8> %arg1, <16 x i8> undef, <64 x i32> zeroinitializer 63 %res1 = select <64 x i1> %arg0, <64 x i8> %res0, <64 x i8> zeroinitializer 79 %res0 = shufflevector <8 x i16> %arg0, <8 x i16> undef, <32 x i32> zeroinitializer 80 %res1 = bitcast <32 x i16> %res0 to <8 x i64> 100 %res0 = shufflevector <8 x i16> %arg2, <8 x i16> undef, <32 x i32> zeroinitializer 101 %res1 = select <32 x i1> %arg1, <32 x i16> %res0, <32 x i16> %arg0 [all …]
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/external/libvpx/vpx_dsp/mips/ |
D | sum_squares_msa.c | 19 v2i64 res0 = { 0 }; in vpx_sum_squares_2d_i16_msa() local 31 res0 = __msa_hadd_s_d(mul0, mul0); in vpx_sum_squares_2d_i16_msa() 32 res0 += __msa_splati_d(res0, 1); in vpx_sum_squares_2d_i16_msa() 33 ss_res = (uint64_t)__msa_copy_s_d(res0, 0); in vpx_sum_squares_2d_i16_msa() 43 res0 = __msa_hadd_s_d(mul0, mul0); in vpx_sum_squares_2d_i16_msa() 44 res0 += __msa_splati_d(res0, 1); in vpx_sum_squares_2d_i16_msa() 45 ss_res = (uint64_t)__msa_copy_s_d(res0, 0); in vpx_sum_squares_2d_i16_msa() 71 res0 += __msa_hadd_s_d(mul0, mul0); in vpx_sum_squares_2d_i16_msa() 73 res0 += __msa_splati_d(res0, 1); in vpx_sum_squares_2d_i16_msa() 74 ss_res = (uint64_t)__msa_copy_s_d(res0, 0); in vpx_sum_squares_2d_i16_msa() [all …]
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D | vpx_convolve8_avg_horiz_msa.c | 23 v8i16 filt, res0, res1; in common_hz_8t_and_aver_dst_4x4_msa() local 39 filt0, filt1, filt2, filt3, res0, res1); in common_hz_8t_and_aver_dst_4x4_msa() 42 SRARI_H2_SH(res0, res1, FILTER_BITS); in common_hz_8t_and_aver_dst_4x4_msa() 43 SAT_SH2_SH(res0, res1, 7); in common_hz_8t_and_aver_dst_4x4_msa() 44 res = PCKEV_XORI128_UB(res0, res1); in common_hz_8t_and_aver_dst_4x4_msa() 55 v16u8 mask0, mask1, mask2, mask3, res0, res1, res2, res3; in common_hz_8t_and_aver_dst_4x8_msa() local 85 PCKEV_B4_UB(vec0, vec0, vec1, vec1, vec2, vec2, vec3, vec3, res0, res1, res2, in common_hz_8t_and_aver_dst_4x8_msa() 87 ILVR_D2_UB(res1, res0, res3, res2, res0, res2); in common_hz_8t_and_aver_dst_4x8_msa() 88 XORI_B2_128_UB(res0, res2); in common_hz_8t_and_aver_dst_4x8_msa() 89 AVER_UB2_UB(res0, dst0, res2, dst1, res0, res2); in common_hz_8t_and_aver_dst_4x8_msa() [all …]
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/external/libvpx/vp8/common/loongarch/ |
D | idct_lsx.c | 116 __m128i vec, res0, res1, res2, res3, dst0, dst1; in idct4x4_addconst_lsx() local 129 res0, res1, res2, res3); in idct4x4_addconst_lsx() 130 DUP4_ARG2(__lsx_vadd_h, res0, vec, res1, vec, res2, vec, res3, vec, res0, in idct4x4_addconst_lsx() 132 res0 = __lsx_vclip255_h(res0); in idct4x4_addconst_lsx() 137 DUP2_ARG2(__lsx_vpickev_b, res1, res0, res3, res2, dst0, dst1); in idct4x4_addconst_lsx() 159 __m128i hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3, res0, res1, res2, res3; in dequant_idct4x4_addblk_2x_lsx() local 196 res0, res1, res2, res3); in dequant_idct4x4_addblk_2x_lsx() 197 DUP4_ARG2(__lsx_vadd_h, res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, in dequant_idct4x4_addblk_2x_lsx() 200 res0 = __lsx_vclip255_h(res0); in dequant_idct4x4_addblk_2x_lsx() 204 DUP2_ARG2(__lsx_vpickev_b, res1, res0, res3, res2, vt0l, vt1l); in dequant_idct4x4_addblk_2x_lsx() [all …]
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/external/libvpx/vpx_dsp/x86/ |
D | fwd_txfm_sse2.h | 70 int res0, res1; in check_epi16_overflow_x8() local 71 res0 = check_epi16_overflow_x4(preg0, preg1, preg2, preg3); in check_epi16_overflow_x8() 73 return res0 + res1; in check_epi16_overflow_x8() 81 int res0, res1; in check_epi16_overflow_x12() local 82 res0 = check_epi16_overflow_x4(preg0, preg1, preg2, preg3); in check_epi16_overflow_x12() 84 if (!res0) res0 = check_epi16_overflow_x4(preg8, preg9, preg10, preg11); in check_epi16_overflow_x12() 85 return res0 + res1; in check_epi16_overflow_x12() 95 int res0, res1; in check_epi16_overflow_x16() local 96 res0 = check_epi16_overflow_x4(preg0, preg1, preg2, preg3); in check_epi16_overflow_x16() 98 if (!res0) { in check_epi16_overflow_x16() [all …]
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D | highbd_convolve_avx2.c | 342 __m256i signal[8], res0, res1; in vpx_highbd_filter_block1d8_h8_avx2() local 351 filter_8x1_pixels(signal, ff, &res0); in vpx_highbd_filter_block1d8_h8_avx2() 353 store_8x2_pixels(&res0, &res1, &max, dst_ptr, dst_pitch); in vpx_highbd_filter_block1d8_h8_avx2() 361 filter_8x1_pixels(signal, ff, &res0); in vpx_highbd_filter_block1d8_h8_avx2() 362 store_8x1_pixels(&res0, &max, dst_ptr); in vpx_highbd_filter_block1d8_h8_avx2() 369 __m256i signal[8], res0, res1; in vpx_highbd_filter_block1d16_h8_avx2() local 378 filter_8x1_pixels(signal, ff, &res0); in vpx_highbd_filter_block1d16_h8_avx2() 380 store_16x1_pixels(&res0, &res1, &max, dst_ptr); in vpx_highbd_filter_block1d16_h8_avx2() 462 __m256i signal[2], res0, res1; in vpx_highbd_filter_block1d8_h2_avx2() local 471 filter_16_2t_pixels(signal, &ff, &res0, &res1); in vpx_highbd_filter_block1d8_h2_avx2() [all …]
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/external/arm-optimized-routines/math/ |
D | sincosf.h | 137 uint64_t n, res0, res1, res2; in reduce_large() local 142 res0 = xi * arr[0]; in reduce_large() 145 res0 = (res2 >> 32) | (res0 << 32); in reduce_large() 146 res0 += res1; in reduce_large() 148 n = (res0 + (1ULL << 61)) >> 62; in reduce_large() 149 res0 -= n << 62; in reduce_large() 150 double x = (int64_t)res0; in reduce_large()
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/external/arm-optimized-routines/pl/math/ |
D | tanf_3u3.c | 78 uint64_t n, res0, res1, res2; in reduce_large() local 83 res0 = xi * arr[0]; in reduce_large() 86 res0 = (res2 >> 32) | (res0 << 32); in reduce_large() 87 res0 += res1; in reduce_large() 89 n = (res0 + (1ULL << 61)) >> 62; in reduce_large() 90 res0 -= n << 62; in reduce_large() 91 double x = (int64_t) res0; in reduce_large()
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/external/tensorflow/tensorflow/compiler/mlir/tfrt/python_tests/ |
D | multiple_results_test.py | 51 [res0, res1] = jitrt.execute(compiled, [arg0]) 52 np.testing.assert_allclose(res0, arg0 + 1.0, atol=0.0) 76 [res0, res1, res2] = jitrt.execute(compiled, [arg0]) 77 np.testing.assert_allclose(res0, arg0 + 1.0, atol=0.0) 97 [res0, res1] = jitrt.execute(compiled, [arg0]) 98 np.testing.assert_allclose(res0, arg0 + 1.0, atol=0.0)
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/external/cronet/third_party/boringssl/src/crypto/fipsmodule/modes/asm/ |
D | aesv8-gcm-armv8.pl | 228 my ($ctr0,$ctr1,$ctr2,$ctr3,$res0,$res1,$res2,$res3)=map("v$_",(0..7)); 499 pmull2 $acc_h.1q, $res0.2d, $h4.2d // GHASH block 4k - high 501 mov $t0d, $res0.d[1] // GHASH block 4k - mid 505 pmull $acc_l.1q, $res0.1d, $h4.1d // GHASH block 4k - low 506 eor $t0.8b, $t0.8b, $res0.8b // GHASH block 4k - mid 661 pmull $acc_l.1q, $res0.1d, $h4.1d // GHASH block 4k - low 662 mov $t0d, $res0.d[1] // GHASH block 4k - mid 663 pmull2 $acc_h.1q, $res0.2d, $h4.2d // GHASH block 4k - high 666 eor $t0.8b, $t0.8b, $res0.8b // GHASH block 4k - mid 793 mov $rk4d, $res0.d[1] // GHASH final-3 block - mid [all …]
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/external/boringssl/src/crypto/fipsmodule/modes/asm/ |
D | aesv8-gcm-armv8.pl | 228 my ($ctr0,$ctr1,$ctr2,$ctr3,$res0,$res1,$res2,$res3)=map("v$_",(0..7)); 499 pmull2 $acc_h.1q, $res0.2d, $h4.2d // GHASH block 4k - high 501 mov $t0d, $res0.d[1] // GHASH block 4k - mid 505 pmull $acc_l.1q, $res0.1d, $h4.1d // GHASH block 4k - low 506 eor $t0.8b, $t0.8b, $res0.8b // GHASH block 4k - mid 661 pmull $acc_l.1q, $res0.1d, $h4.1d // GHASH block 4k - low 662 mov $t0d, $res0.d[1] // GHASH block 4k - mid 663 pmull2 $acc_h.1q, $res0.2d, $h4.2d // GHASH block 4k - high 666 eor $t0.8b, $t0.8b, $res0.8b // GHASH block 4k - mid 793 mov $rk4d, $res0.d[1] // GHASH final-3 block - mid [all …]
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/external/rust/crates/aho-corasick/src/packed/teddy/ |
D | runtime.rs | 632 let (res0, res1) = members2m128(chunk, self.mask1, self.mask2); in candidate() 633 let res0prev0 = _mm_alignr_epi8(res0, *prev0, 15); in candidate() 694 let (res0, res1) = members2m256(chunk, self.mask1, self.mask2); in candidate() 695 let res0prev0 = alignr256_15(res0, *prev0); in candidate() 697 *prev0 = res0; in candidate() 760 let (res0, res1) = members2m256(chunk, self.mask1, self.mask2); in candidate() 761 let res0prev0 = _mm256_alignr_epi8(res0, *prev0, 15); in candidate() 763 *prev0 = res0; in candidate() 827 let (res0, res1, res2) = in candidate() 829 let res0prev0 = _mm_alignr_epi8(res0, *prev0, 14); in candidate() [all …]
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/external/ltp/testcases/network/dccp/ |
D | dccp01.sh | 15 res0="$(cat tst_netload.res)" 22 tst_netload_compare $res0 $res1 -100 100 29 tst_netload_compare $res0 $res1 -100 100
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/external/swiftshader/third_party/subzero/crosstest/ |
D | test_vector_ops_ll.ll | 9 %res0 = insertelement <4 x float> %vec, float %elt, i32 0 10 ret <4 x float> %res0 35 %res0 = zext <4 x i1> %res0_i1 to <4 x i32> 36 ret <4 x i32> %res0 68 %res0 = zext <8 x i1> %res0_i1 to <8 x i16> 69 ret <8 x i16> %res0 125 %res0 = zext <16 x i1> %res0_i1 to <16 x i8> 126 ret <16 x i8> %res0 201 %res0 = insertelement <4 x i32> %vec, i32 %elt, i32 0 202 ret <4 x i32> %res0 [all …]
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