Searched refs:s_abs_i32 (Results 1 – 6 of 6) sorted by relevance
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | sminmax.ll | 5 ; FUNC-LABEL: {{^}}s_abs_i32:
6 ; GCN: s_abs_i32
10 define void @s_abs_i32(i32 addrspace(1)* %out, i32 %val) nounwind {
36 ; GCN: s_abs_i32
37 ; GCN: s_abs_i32
83 ; TODO: this should use s_abs_i32
84 ; GCN: s_abs_i32
85 ; GCN: s_abs_i32
86 ; GCN: s_abs_i32
87 ; GCN: s_abs_i32
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| /external/llvm/test/MC/AMDGPU/ |
| D | sop1.s | 239 s_abs_i32 s1, s2 label
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| /external/llvm/test/MC/Disassembler/AMDGPU/ |
| D | sop1_vi.txt | 171 # VI: s_abs_i32 s1, s2 ; encoding: [0x02,0x30,0x81,0xbe]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SOPInstructions.td | 280 def S_ABS_I32 : SOP1_32 <"s_abs_i32">;
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstructions.td | 187 defm S_ABS_I32 : SOP1_32 <sop1<0x34, 0x30>, "s_abs_i32", []>;
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| /external/mesa3d/src/amd/compiler/ |
| D | aco_instruction_selection.cpp | 1275 bld.sop1(aco_opcode::s_abs_i32, Definition(dst), bld.def(s1, scc), src); in visit_alu_instr()
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