/external/capstone/suite/MC/AArch64/ |
D | neon-simd-misc.s.cs | 128 0x82,0x38,0x21,0x6e = shll2 v2.8h, v4.16b, #8 129 0x06,0x39,0x61,0x6e = shll2 v6.4s, v8.8h, #16 130 0x06,0x39,0xa1,0x6e = shll2 v6.2d, v8.4s, #32
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/external/llvm/test/MC/AArch64/ |
D | neon-simd-misc.s | 405 shll2 v2.8h, v4.16b, #8 406 shll2 v6.4s, v8.8h, #16 407 shll2 v6.2d, v8.4s, #32
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D | arm64-advsimd.s | 611 shll2.8h v7, v8, #8 612 shll2.4s v9, v10, #16 613 shll2.2d v11, v12, #32 617 shll2 v1.8h, v2.16b, #8 618 shll2 v1.4s, v2.8h, #16 619 shll2 v1.2d, v2.4s, #32 661 ; CHECK: shll2.8h v7, v8, #8 ; encoding: [0x07,0x39,0x21,0x6e] 662 ; CHECK: shll2.4s v9, v10, #16 ; encoding: [0x49,0x39,0x61,0x6e] 663 ; CHECK: shll2.2d v11, v12, #32 ; encoding: [0x8b,0x39,0xa1,0x6e] 667 ; CHECK: shll2.8h v1, v2, #8 ; encoding: [0x41,0x38,0x21,0x6e] [all …]
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D | neon-diagnostics.s | 5753 shll2 v2.8h, v4.16b, #7 5754 shll2 v6.4s, v8.8h, #15 5755 shll2 v6.2d, v8.4s, #31 5762 shll2 v2.8h, v4.8b, #5 5763 shll2 v6.4s, v8.4h, #14 5764 shll2 v6.2d, v8.2s, #1
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/external/python/cpython2/Modules/_ctypes/libffi/src/sh/ |
D | sysv.S | 184 shll2 r0 241 shll2 r0 421 shll2 r0
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/external/libffi/src/sh/ |
D | sysv.S | 184 shll2 r0 241 shll2 r0 421 shll2 r0
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 679 # CHECK: shll2 v2.8h, v4.16b, #8 680 # CHECK: shll2 v6.4s, v8.8h, #16 681 # CHECK: shll2 v6.2d, v8.4s, #32
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1422 __ shll2(v21.V2D(), v28.V4S(), 32); in GenerateTestSequenceNEON() local 1423 __ shll2(v22.V4S(), v1.V8H(), 16); in GenerateTestSequenceNEON() local 1424 __ shll2(v30.V8H(), v25.V16B(), 8); in GenerateTestSequenceNEON() local
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D | test-cpu-features-aarch64.cc | 1633 TEST_NEON(shll2_0, shll2(v0.V8H(), v1.V16B(), 8)) 1634 TEST_NEON(shll2_1, shll2(v0.V4S(), v1.V8H(), 16)) 1635 TEST_NEON(shll2_2, shll2(v0.V2D(), v1.V4S(), 32))
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 1186 0x~~~~~~~~~~~~~~~~ 6ea13b95 shll2 v21.2d, v28.4s, #32 1187 0x~~~~~~~~~~~~~~~~ 6e613836 shll2 v22.4s, v1.8h, #16 1188 0x~~~~~~~~~~~~~~~~ 6e213b3e shll2 v30.8h, v25.16b, #8
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D | log-disasm | 1186 0x~~~~~~~~~~~~~~~~ 6ea13b95 shll2 v21.2d, v28.4s, #32 1187 0x~~~~~~~~~~~~~~~~ 6e613836 shll2 v22.4s, v1.8h, #16 1188 0x~~~~~~~~~~~~~~~~ 6e213b3e shll2 v30.8h, v25.16b, #8
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D | log-cpufeatures-custom | 1185 0x~~~~~~~~~~~~~~~~ 6ea13b95 shll2 v21.2d, v28.4s, #32 ### {NEON} ### 1186 0x~~~~~~~~~~~~~~~~ 6e613836 shll2 v22.4s, v1.8h, #16 ### {NEON} ### 1187 0x~~~~~~~~~~~~~~~~ 6e213b3e shll2 v30.8h, v25.16b, #8 ### {NEON} ###
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D | log-cpufeatures | 1185 0x~~~~~~~~~~~~~~~~ 6ea13b95 shll2 v21.2d, v28.4s, #32 // Needs: NEON 1186 0x~~~~~~~~~~~~~~~~ 6e613836 shll2 v22.4s, v1.8h, #16 // Needs: NEON 1187 0x~~~~~~~~~~~~~~~~ 6e213b3e shll2 v30.8h, v25.16b, #8 // Needs: NEON
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D | log-cpufeatures-colour | 1185 0x~~~~~~~~~~~~~~~~ 6ea13b95 shll2 v21.2d, v28.4s, #32 [1;35mNEON[0;m 1186 0x~~~~~~~~~~~~~~~~ 6e613836 shll2 v22.4s, v1.8h, #16 [1;35mNEON[0;m 1187 0x~~~~~~~~~~~~~~~~ 6e213b3e shll2 v30.8h, v25.16b, #8 [1;35mNEON[0;m
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D | log-all | 5352 0x~~~~~~~~~~~~~~~~ 6ea13b95 shll2 v21.2d, v28.4s, #32 5354 0x~~~~~~~~~~~~~~~~ 6e613836 shll2 v22.4s, v1.8h, #16 5356 0x~~~~~~~~~~~~~~~~ 6e213b3e shll2 v30.8h, v25.16b, #8
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/external/vixl/src/aarch64/ |
D | macro-assembler-aarch64.h | 2997 V(shll2, Shll2) \ 3038 V(shll2, sshll2, Sshll2) \ 3039 V(shll2, ushll2, Ushll2)
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D | simulator-aarch64.h | 3769 LogicVRegister shll2(VectorFormat vform,
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D | assembler-aarch64.h | 2996 void shll2(const VRegister& vd, const VRegister& vn, int shift);
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D | assembler-aarch64.cc | 3498 void Assembler::shll2(const VRegister& vd, const VRegister& vn, int shift) { in shll2() function in vixl::aarch64::Assembler
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D | logic-aarch64.cc | 1529 LogicVRegister Simulator::shll2(VectorFormat vform, in shll2() function in vixl::aarch64::Simulator
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D | simulator-aarch64.cc | 6941 shll2(vf, rd, rn); in VisitNEON2RegMisc()
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/external/capstone/arch/AArch64/ |
D | AArch64MappingInsnOp.inc | 5069 { /* AArch64_SHLLv16i8, ARM64_INS_SHLL2: shll2.8h $rd, $rn, #8 */ 5081 { /* AArch64_SHLLv4i32, ARM64_INS_SHLL2: shll2.2d $rd, $rn, #32 */ 5085 { /* AArch64_SHLLv8i16, ARM64_INS_SHLL2: shll2.4s $rd, $rn, #16 */
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 4700 "shll2", ".8h", ".16b", "8">; 4704 "shll2", ".4s", ".8h", "16">; 4708 "shll2", ".2d", ".4s", "32">;
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-vshift.ll | 1831 ; CHECK: shll2.4s v0, {{v[0-9]+}}, #16
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 5548 "shll2", ".8h", ".16b", "8">; 5552 "shll2", ".4s", ".8h", "16">; 5556 "shll2", ".2d", ".4s", "32">;
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