Searched refs:shrnb (Results 1 – 8 of 8) sorted by relevance
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SVEInstrInfo.td | 1452 …defm SHRNB_ZZI : sve2_int_bin_shift_imm_right_narrow_bottom<0b010, "shrnb", int_aarch64_sv…
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenAsmMatcher.inc | 12562 "shadd\003shl\004shll\005shll2\004shrn\005shrn2\005shrnb\005shrnt\005shs" 17288 …{ 4311 /* shrnb */, AArch64::SHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2,… 17289 …{ 4311 /* shrnb */, AArch64::SHRNB_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorDReg1_1__Imm1_321_2,… 17290 …{ 4311 /* shrnb */, AArch64::SHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, … 24661 …{ 4311 /* shrnb */, AArch64::SHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2,… 24662 …{ 4311 /* shrnb */, AArch64::SHRNB_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorDReg1_1__Imm1_321_2,… 24663 …{ 4311 /* shrnb */, AArch64::SHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, … 36251 { 4311 /* shrnb */, 1 /* 0 */, MCK_SVEVectorHReg, AMFBS_HasSVE2 }, 36252 { 4311 /* shrnb */, 2 /* 1 */, MCK_SVEVectorSReg, AMFBS_HasSVE2 }, 36253 { 4311 /* shrnb */, 1 /* 0 */, MCK_SVEVectorHReg, AMFBS_HasSVE2 }, [all …]
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 6200 void shrnb(const ZRegister& zd, const ZRegister& zn, int shift);
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D | assembler-sve-aarch64.cc | 7472 V(shrnb, 0x45201000) \
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D | macro-assembler-aarch64.h | 6753 shrnb(zd, zn, shift); in Shrnb()
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/external/vixl/test/aarch64/ |
D | test-api-movprfx-aarch64.cc | 2554 __ shrnb(z7.VnB(), z4.VnH(), 1); in TEST() local
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 9996 void shrnb(const ZRegister& zd, const ZRegister& zn, int shift)
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/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/ |
D | IntrinsicImpl.inc | 717 "llvm.aarch64.sve.shrnb", 10850 48, // llvm.aarch64.sve.shrnb
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