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/external/vixl/src/aarch64/
Dlogic-aarch64.cc4527 T sign_prod = copysign(1.0, op1) * copysign(1.0, op2); in FPMulAdd() local
4532 (IsInf(a) && isinf_prod && (sign_a != sign_prod)); // inf - inf in FPMulAdd()
4553 return ((sign_a < T(0.0)) && (sign_prod < T(0.0))) ? -0.0 : 0.0; in FPMulAdd()
4562 return copysign(0.0, sign_prod); in FPMulAdd()