/external/llvm/test/CodeGen/AArch64/ |
D | arm64-mul.ll | 126 ; CHECK: smaddl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
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D | dp-3source.ll | 41 ; CHECK: smaddl {{x[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, {{x[0-9]+}}
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D | aarch64-fix-cortex-a53-835769.ll | 165 ; CHECK-NEXT: smaddl 168 ; CHECK-NOWORKAROUND-NEXT: smaddl
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/external/llvm/test/MC/AArch64/ |
D | arm64-arithmetic-encoding.s | 464 smaddl x1, w2, w3, x4 473 ; CHECK: smaddl x1, w2, w3, x4 ; encoding: [0x41,0x10,0x23,0x9b]
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D | basic-a64-instructions.s | 1605 smaddl x3, w5, w2, x9 1606 smaddl xzr, w10, w11, x12 1607 smaddl x13, wzr, w14, x15 1608 smaddl x16, w17, wzr, x18 1609 smaddl x19, w20, w21, xzr
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/external/capstone/suite/MC/AArch64/ |
D | basic-a64-instructions.s.cs | 618 0xa3,0x24,0x22,0x9b = smaddl x3, w5, w2, x9 619 0x5f,0x31,0x2b,0x9b = smaddl xzr, w10, w11, x12 620 0xed,0x3f,0x2e,0x9b = smaddl x13, wzr, w14, x15 621 0x30,0x4a,0x3f,0x9b = smaddl x16, w17, wzr, x18
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-arithmetic.txt | 431 # CHECK: smaddl x1, w2, w3, x4
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D | basic-a64-instructions.txt | 1166 # CHECK: smaddl x3, w5, w2, x9 1167 # CHECK: smaddl xzr, w10, w11, x12 1168 # CHECK: smaddl x13, wzr, w14, x15 1169 # CHECK: smaddl x16, w17, wzr, x18
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/external/vixl/test/aarch64/ |
D | test-disasm-aarch64.cc | 458 COMPARE(smaddl(x0, w1, w2, x3), "smaddl x0, w1, w2, x3"); in TEST() 459 COMPARE(smaddl(x30, w21, w22, x16), "smaddl x30, w21, w22, x16"); in TEST()
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D | test-cpu-features-aarch64.cc | 429 TEST_NONE(smaddl_0, smaddl(x0, w1, w2, x3))
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 985 void smaddl(const Register& xd,
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D | assembler-aarch64.cc | 938 void Assembler::smaddl(const Register& xd, in smaddl() function in vixl::aarch64::Assembler
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D | macro-assembler-aarch64.h | 2328 smaddl(rd, rn, rm, ra); in Smaddl()
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/external/capstone/arch/AArch64/ |
D | AArch64MappingInsnOp.inc | 5205 { /* AArch64_SMADDLrrr, ARM64_INS_SMADDL: smaddl $rd, $rn, $rm, $ra */
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 2353 void smaddl(const Register& xd,
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 737 def SMADDLrrr : WideMulAccum<0, 0b001, "smaddl", add, sext>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 1327 def SMADDLrrr : WideMulAccum<0, 0b001, "smaddl", add, sext>;
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenAsmMatcher.inc | 12564 "1b\007sm3tt2a\007sm3tt2b\004sm4e\007sm4ekey\006smaddl\004smax\005smaxp\005" 17331 …{ 4412 /* smaddl */, AArch64::SMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MC… 24704 …{ 4412 /* smaddl */, AArch64::SMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MC…
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