| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb-tests.txt | 290 # CHECK: smlad r5, r12, r8, r11
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| D | invalid-armv7.txt | 272 # Undefined encodings for smlad
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| D | basic-arm-instructions.txt | 1593 # CHECK: smlad r2, r3, r5, r8
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| D | thumb2.txt | 1771 # CHECK: smlad r2, r3, r5, r8
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| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 649 0x13,0x85,0x02,0xe7 = smlad r2, r3, r5, r8
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3063 void smlad(
3065 void smlad(Register rd, Register rn, Register rm, Register ra) { in smlad() function
3066 smlad(al, rd, rn, rm, ra); in smlad()
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| D | disasm-aarch32.h | 1091 void smlad(
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| D | disasm-aarch32.cc | 2574 void Disassembler::smlad( in smlad() function in vixl::aarch32::Disassembler
21903 smlad(CurrentCond(), in DecodeT32()
63777 smlad(condition, in DecodeA32()
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| D | assembler-aarch32.cc | 9905 void Assembler::smlad( in smlad() function in vixl::aarch32::Assembler
9927 Delegate(kSmlad, &Assembler::smlad, cond, rd, rn, rm, ra); in smlad()
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| D | macro-assembler-aarch32.h | 3580 smlad(cond, rd, rn, rm, ra); in Smlad()
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| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2287 smlad r2, r3, r5, r8
2293 @ CHECK: smlad r2, r3, r5, r8 @ encoding: [0x23,0xfb,0x05,0x82]
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| D | basic-arm-instructions.s | 2385 smlad r2, r3, r5, r8
2390 @ CHECK: smlad r2, r3, r5, r8 @ encoding: [0x13,0x85,0x02,0xe7]
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| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 745 { /* ARM_SMLAD, ARM_INS_SMLAD: smlad${p} $rd, $rn, $rm, $ra */
5971 { /* ARM_t2SMLAD, ARM_INS_SMLAD: smlad${p} $rd, $rn, $rm, $ra */
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| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 745 { /* ARM_SMLAD, ARM_INS_SMLAD: smlad${p} $rd, $rn, $rm, $ra */
5971 { /* ARM_t2SMLAD, ARM_INS_SMLAD: smlad${p} $rd, $rn, $rm, $ra */
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2876 (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "smlad",
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 3088 def t2SMLAD : T2DualHalfMulAdd<0b010, 0b0000, "smlad", int_arm_smlad>;
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 9901 "bb\006smlabt\005smlad\006smladx\005smlal\007smlalbb\007smlalbt\006smlal"
11109 …{ 1119 /* smlad */, ARM::t2SMLAD, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_IsTh…
11110 …{ 1119 /* smlad */, ARM::SMLAD, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_IsARM_…
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| /external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/ |
| D | IntrinsicImpl.inc | 1836 "llvm.arm.smlad",
11969 1, // llvm.arm.smlad
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