| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 666 0x35,0x28,0x43,0xe7 = smlaldx r2, r3, r5, r8
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3099 void smlaldx(
3101 void smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) { in smlaldx() function
3102 smlaldx(al, rdlo, rdhi, rn, rm); in smlaldx()
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| D | disasm-aarch32.h | 1109 void smlaldx(
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| D | disasm-aarch32.cc | 2616 void Disassembler::smlaldx( in smlaldx() function in vixl::aarch32::Disassembler
22498 smlaldx(CurrentCond(), in DecodeT32()
64232 smlaldx(condition, in DecodeA32()
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| D | assembler-aarch32.cc | 10063 void Assembler::smlaldx( in smlaldx() function in vixl::aarch32::Assembler
10087 Delegate(kSmlaldx, &Assembler::smlaldx, cond, rdlo, rdhi, rn, rm); in smlaldx()
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| D | macro-assembler-aarch32.h | 3676 smlaldx(cond, rdlo, rdhi, rn, rm); in Smlaldx()
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| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2340 smlaldx r2, r3, r5, r8
2346 @ CHECK: smlaldx r2, r3, r5, r8 @ encoding: [0xc5,0xfb,0xd8,0x23]
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| D | basic-arm-instructions.s | 2436 smlaldx r2, r3, r5, r8
2441 @ CHECK: smlaldx r2, r3, r5, r8 @ encoding: [0x35,0x28,0x43,0xe7]
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1644 # CHECK: smlaldx r2, r3, r5, r8
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| D | thumb2.txt | 1823 # CHECK: smlaldx r2, r3, r5, r8
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| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 763 { /* ARM_SMLALDX, ARM_INS_SMLALDX: smlaldx${p} $rdlo, $rdhi, $rn, $rm */
5989 { /* ARM_t2SMLALDX, ARM_INS_SMLALDX: smlaldx${p} $ra, $rd, $rn, $rm */
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| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 763 { /* ARM_SMLALDX, ARM_INS_SMLALDX: smlaldx${p} $rdlo, $rdhi, $rn, $rm */
5989 { /* ARM_t2SMLALDX, ARM_INS_SMLALDX: smlaldx${p} $ra, $rd, $rn, $rm */
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2897 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaldx",
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 3103 def t2SMLALDX : T2DualHalfMulAddLong<0b100, 0b1101, "smlaldx">;
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 9902 "d\007smlaldx\007smlaltb\007smlaltt\006smlatb\006smlatt\006smlawb\006sml"
11122 …{ 1161 /* smlaldx */, ARM::t2SMLALDX, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__Tie0_1_1__Tie1_1_1_…
11123 …{ 1161 /* smlaldx */, ARM::SMLALDX, Convert__Reg1_1__Reg1_2__Reg1_3__Reg1_4__Tie0_1_1__Tie1_1_1__C…
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| /external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/ |
| D | IntrinsicImpl.inc | 1839 "llvm.arm.smlaldx",
11972 1, // llvm.arm.smlaldx
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